Z8FMC160100KIT Zilog, Z8FMC160100KIT Datasheet - Page 252
![KIT DEV FOR Z8 ENCORE Z8FMC16100](/photos/9/6/90634/z8fmc160100kit_sml.jpg)
Z8FMC160100KIT
Manufacturer Part Number
Z8FMC160100KIT
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KIT.pdf
(20 pages)
Specifications of Z8FMC160100KIT
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphic User Interface
Processor To Be Evaluated
Z8FMC16100
Data Bus Width
8 bit
Interface Type
USB
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3639
- Current page: 252 of 383
- Download datasheet (5Mb)
PS024613-0910
Caution:
Debug Mode
The serial data on the DBG pin is sent using the standard asynchronous data format
defined in RS-232. This pin interfaces the Z8FMC16100 Series Flash MCU device to the
serial port of a host PC using minimal external hardware. Two different methods for
connecting the DBG pin to an RS-232 interface are displayed in
For operation of the Z8FMC16100 Series Flash MCU, power pins (V
be supplied with power, and ground pins (V
DBG pin must always be connected to V
Figure 42. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface (1)
Figure 43. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface (2)
The operating characteristics of the Z8FMC16100 Series Flash MCU device in DEBUG
mode are:
•
The eZ8 CPU fetch unit stops, idling the eZ8 CPU, unless directed by the OCD to
execute specific instructions
RS232 RX
RS232 TX
RS232 RX
RS232 TX
Transceiver
Transceiver
RS-232
RS-232
DD
SS
through an external pull-up resistor.
Open-Drain
and AV
Buffer
Diode
Z8FMC16100 Series Flash MCU
SS
V
) must be properly grounded. The
DD
V
DD
DBG pin
Product Specification
DBG pin
Figure 42
DD
and AV
and
Debug Mode
Figure
DD
) must
43.
240
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