DK86065-2 Fujitsu Semiconductor America Inc, DK86065-2 Datasheet - Page 23

• Manufacturer Part Number: DK86065-2
• Description: KIT EVAL 16BIT DAC FOR MB86065
• Manufacturer: Fujitsu Semiconductor America Inc

Specifications of DK86065-2

• Number Of Dac's: 1
• Number Of Bits: 14
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MB86065
• For Use With: 865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1011

September 2007 Version 1.01
FME/MS/DAC80S/DS/5344
MB86065 14-bit 1+GSa/s DAC
The DAC will now sample both input ports, for consecutive DAC samples, as the EVEN and ODD
routing through the Waveform Memory Module is not the same.
3.2
To make full use of the Waveform Memory Module user waveforms may be downloaded to the on-
chip memories. Different waveforms of equal length may be stored in each RAM, totalling up to 16k
points (in multiples of eight points). Configuration of the WMM [EVEN/ODD] MUX CTRL registers will
determine which vector is routed to the DAC.
Copyright © 2004-2007 Fujitsu Microelectronics Europe GmbH
Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
Clock Output
EVEN Data
ODD] CONFIG
WMM [EVEN/
ODD Data
Table 16: WMM Register: WMM [EVEN/ODD] CONFIG [0x10/0x20] (Part 1 of 2)
Waveform Memory Module Operation
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
(bit)
Remember to set register WMM CONFIG [0x00] bit data_direct to ‘1’ (see Table 10)
Before the waveform memories can be used they must be enabled through register WMM
[EVEN/ODD] CONFIG, bit ram_ih. See Table 16.
1
Figure 14 Interleaved Mode ODD and EVEN Data Sampling
Label
ram_ih
D
D
N+1
N=0
Waveform Memory inhibit control
0 = Memories Enabled
1 = Memories Disabled (default)
D
D
N+3
N+2
Function
Production
D
D
N+5
N+4
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