MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 29
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 29 of 117
- Download datasheet (2Mb)
8.4.2
Table 27
supported. Clock is recovered from the data.
eye diagram.
Freescale Semiconductor
At recommended operating conditions with XVDD_SRDS2 = 1.0 V ± 5%.
Deterministic jitter tolerance
Combined deterministic and random jitter
tolerance
Sinusoidal jitter tolerance
Total jitter tolerance
Bit error ratio
Unit interval
AC coupling capacitor
Notes:
1. Measured at receiver.
2. Each UI value is 800 ps ± 100 ppm.
3. The external AC coupling capacitor is required. It’s recommended to be placed near the device transmitter outputs.
provides the SGMII receive AC timing specifications. Source synchronous clocking is not
SGMII Receive AC Timing Specifications
Parameter
–Vrx_diffpp_max/2
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
–Vrx_diffpp_min/2
Vrx_diffpp_max/2
Vrx_diffpp_min/2
Table 27. SGMII Receiver AC Timing Specifications
0
Figure 9. Receive Input Compliance Mask
0
Symbol
BER
Jsin
C
J
J
J
UI
Figure 9
DR
TX
D
T
0.275
shows the SGMII receiver input compliance mask
799.92
0.37
0.55
0.65
Min
0.4
0.1
—
5
Time (UI)
Enhanced Three-Speed Ethernet (eTSEC), MII Management
0.6
Typ
800
—
—
—
—
—
—
0.725
800.08
10
Max
200
—
—
—
—
-12
1
UI p-p
UI p-p
UI p-p
UI p-p
Unit
nF
—
ps
Notes
—
1
1
1
2
3
1
29
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