MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 94
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
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- Download datasheet (2Mb)
Clocking
Note that there is no default for this PLL ratio; these signals must be pulled to the desired values. Also note
that the DDR data rate is the determining factor in selecting the CCB bus frequency, since the CCB
frequency must equal the DDR data rate.
19.3
Table 66
ratio is determined by the binary value of LBCTL, LALE, and LGPL2 at power up, as shown in
19.4
For specifications on the PCI_CLK, refer to the PCI 2.2 Local Bus Specifications.
The use of PCI_CLK is optional if SYSCLK is in the range of 33–66 MHz. If SYSCLK is outside this
range then use of PCI_CLK is required as a separate PCI clock source, asynchronous with respect to
SYSCLK.
94
LBCTL, LALE, LGPL2
Binary Value of
LA[28:31] Signals
Binary Value of
Signals
describes the clock ratio between the e500 core complex bus (CCB) and the e500 core clock. This
000
001
010
011
e500 Core PLL Ratio
PCI Clocks
0000
0001
0010
0011
0100
0101
0110
0111
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
e500 core:CCB Clock Ratio
CCB:SYSCLK Ratio
Table 66. e500 Core to CCB Clock Ratio
Reserved
Reserved
Reserved
Reserved
Reserved
4:1
3:2
16:1
3:1
4:1
5:1
6:1
Table 65. CCB Clock Ratio
LBCTL, LALE, LGPL2
Binary Value of
LA[28:31] Signals
Binary Value of
Signals
100
101
110
111
1000
1001
1010
1011
1100
1101
1110
1111
e500 core:CCB Clock Ratio
CCB:SYSCLK Ratio
Freescale Semiconductor
Reserved
Reserved
Reserved
Reserved
2:1
5:2
3:1
7:2
10:1
12:1
8:1
9:1
Table
66.
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