EVAL-ADUC7032QSPZ Analog Devices Inc, EVAL-ADUC7032QSPZ Datasheet - Page 19
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EVAL-ADUC7032QSPZ
Manufacturer Part Number
EVAL-ADUC7032QSPZ
Description
EVAL DEV QUICK START ADUC7032
Manufacturer
Analog Devices Inc
Series
QuickStart™ PLUS Kitr
Type
MCUr
Datasheet
1.EVAL-ADUC7032QSPZ.pdf
(116 pages)
Specifications of EVAL-ADUC7032QSPZ
Contents
Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
For Use With/related Products
ADuC7032
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
THEORY OF OPERATION
The ADuC7032-8L is a complete system solution for battery
monitoring in 12 V automotive applications. The device integrates
all of the required features to precisely and intelligently monitor,
process, and diagnose 12 V battery parameters, including
battery current, voltage, and temperature, over a wide range of
operating conditions.
Minimizing external system components, the device is powered
directly from the 12 V battery. An on-chip, low dropout (LDO)
regulator generates the supply voltage for the three integrated
16-bit ADCs. The ADCs precisely measure battery current,
voltage, and temperature, which can be used to characterize the
state of health and charge of a car battery.
A Flash/EE memory-based ARM7™ microcontroller (MCU) is
also integrated on-chip and is used both to preprocess the
acquired battery variables and to manage communications from
the ADuC7032-8L to the main electronic control unit (ECU)
via a local interconnect network (LIN) interface, which is
integrated on-chip.
Both the MCU and the ADC subsystem can be individually
configured to operate in normal or flexible power saving modes
of operation.
In its normal operating mode, the MCU is clocked indirectly
from an on-chip oscillator via the phase-locked loop (PLL) at
a maximum clock rate of 20.48 MHz. In its power-saving operating
modes, the MCU can be totally powered down, waking up only
in response to an ADC conversion result ready, digital comparators,
the wake-up timer, a power-on reset (POR), or an external serial
communication event.
The ADC can be configured to operate in a normal (full-power)
mode of operation, interrupting the MCU after various sample
conversion events. The current channel features two low power
modes: low power and low power plus, generating conversion
results to a lower performance specification.
On-chip factory firmware supports in-circuit Flash/EE memory
reprogramming via the LIN or JTAG serial interface ports, and
nonintrusive emulation is also supported via the JTAG interface.
These features are incorporated into a low cost QuickStart™ Plus
development system supporting the ADuC7032-8L.
The ADuC7032-8L operates directly from the 12 V battery
supply and is fully specified over a temperature range of −40°C
to +105°C. The ADuC7032-8L is functional, with degraded
performance, at temperatures from 105°C to 125°C.
Rev.0 | Page 19 of 116
OVERVIEW OF THE ARM7TDMI® CORE
The ARM7 core is a 32-bit reduced instruction set computer
(RISC), developed by ARM Ltd. The ARM7TDMI is
a von Neumann-based architecture, which means that it uses
a single 32-bit bus for instruction and data. The length of the
data can be 8, 16, or 32 bits; and the length of the instruction word
is either 16 bits or 32 bits, depending on the mode in which the
core is operating.
The ARM7TDMI is an ARM7 core with four additional features,
as listed in Table 9.
Table 9. ARM7TDMI Features
Feature
T
D
M
I
Thumb Mode (T)
An ARM® instruction is 32 bits long. The ARM7TDMI processor
supports the Thumb instruction set, which has been compressed
into 16 bits. Faster code execution from 16-bit memory and
greater code density can be achieved by using the Thumb
instruction set, which makes the ARM7TDMI core particularly
suited for embedded applications.
However, Thumb mode has three limitations.
•
•
•
Multiplier (M)
The ARM7TDMI instruction set includes an enhanced
multiplier, with four extra instructions that perform 32-bit ×
32-bit multiplication with a 64-bit result and 32-bit × 32-bit
multiplication-accumulation (MAC) with a 64-bit result.
Relative to ARM, Thumb code usually requires more
instructions to perform that same task. Therefore, in most
applications ARM code is best used for maximizing the
performance of time-critical code.
The Thumb instruction set does not include some
instructions that are needed for exception handling.
Therefore, ARM code may be required for exception
handling.
When an interrupt occurs, the core vectors to the
interrupt location in memory and executes the code
present at this address. It is required that the first
command be in ARM code.
Description
Support for the Thumb® (16-bit) instruction set
Support for debug
Enhanced multiplier
Includes the EmbeddedICE™ module to support
embedded system debugging
ADuC7032-8L