EVAL-ADUC7032QSPZ Analog Devices Inc, EVAL-ADUC7032QSPZ Datasheet - Page 46

• Manufacturer Part Number: EVAL-ADUC7032QSPZ
• Description: EVAL DEV QUICK START ADUC7032
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ PLUS Kitr
• Type: MCUr

Specifications of EVAL-ADUC7032QSPZ

• Contents: Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
• For Use With/related Products: ADuC7032
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit
15
14 to 10
9
8
7 to 6
5 to 4
3 to 0
ADuC7032-8L
Voltage Channel ADC Control Register
Name: ADC1CON
Address: 0xFFFF0510
Default Value: 0x0000
Access: Read/write
Function: The voltage channel ADC control MMR is a 16-bit register that is used to configure the V-ADC. Note that when enabling/
disabling the voltage ADC, the voltage attenuator must also be enabled/disabled via HVCFG1[7].
Table 38. ADC1CON MMR Bit Designations
Temperature Channel ADC Control Register
Name: ADC2CON
Address: 0xFFFF0514
Default Value: 0x0000
Access: Read/write
Function: The temperature channel ADC control MMR is a 16-bit register that is used to configure the T-ADC.
Table 39. ADC2CON MMR Bit Designations
Bit
15
14 to 13
12 to 10
9
8
Description
Voltage Channel ADC Enable .
Not Used. Reserved for future functionality and should not be modified by user code.
Voltage Channel ADC Output Coding.
Not Used. This bit is reserved for future functionality and should be written as 0 by user code.
Voltage Channel ADC Input Select.
Voltage Channel ADC Reference Select.
Not Used. Reserved for future functionality and should be written as 0 by user code.
Description
Temperature Channel ADC Enable.
VTEMP Current Source Enable.
Note that these current sources have a tolerance of ±30%.
Not Used. Reserved for future functionality and should not be modified by user code.
Temperature Channel ADC Output Coding.
Not Used. Reserved for future functionality and should be written as 0 by user code.
Set to 1 by user code to enable the V-ADC. When enabling/disabling the voltage ADC, the voltage attenuator must also be
enabled/disabled via HVCFG1[7].
Cleared to 0 to power down the V-ADC.
Set to 1 by user code to configure V-ADC output coding as unipolar.
Cleared to 0 by user code to configure V-ADC output coding as twos complement.
00 = VBAT/24, AGND; VBAT attenuator selected.
01 = not defined.
10 = not defined.
11 = internal short; shorted input.
00 = internal, 1.2 V precision reference selected.
01 = external reference inputs (VREF, GND_SW) selected.
10 = external reference inputs divided by 2 ((VREF, GND_SW)/2) selected. This allows an external reference up to REG_AVDD.
11 = (REG_AVDD, AGND) divided by 2 selected.
Set to 1 by user code to enable the T-ADC.
Cleared to 0 to power down the T-ADC.
00 = current sources off.
01 = enable 50 μA current source on VTEMP.
10 = enable 50 μA current source on GND_SW.
11 = enable 50 μA current source on both VTEMP and GND_SW.
Set to 1 by user code to configure T-ADC output coding as unipolar.
Cleared to 0 by user code to configure T-ADC output coding as twos complement.
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