EVAL-ADUC7032QSPZ Analog Devices Inc, EVAL-ADUC7032QSPZ Datasheet - Page 72

• Manufacturer Part Number: EVAL-ADUC7032QSPZ
• Description: EVAL DEV QUICK START ADUC7032
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ PLUS Kitr
• Type: MCUr

Specifications of EVAL-ADUC7032QSPZ

• Contents: Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
• For Use With/related Products: ADuC7032
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7032-8L
Timer1 Capture Register
Name: T1CAP
Address: 0xFFFF0330
Default Value: 0x00000000
Access: Read/write
Function: This 32-bit register holds the 32-bit value captured
by an enabled IRQ event.
Table 55. T1CON MMR Bit Designations
Bit
31 to 24
23
22 to 20
19
18
17
16 to 12
11 to 9
8
7
6
5 to 4
3 to 0
Description
Timer1 8-Bit Postscalar.
Timer1 Enable Postscalar.
Reserved. This bit is reserved and should be written as 0 by user code.
Postscalar Compare Flag.
Timer1 Interrupt Source.
Event Select Bit.
Event Select Range, 0 to 31. The events are described in Table 53.
Clock Select.
Count Up.
Timer1 Enable Bit.
Timer1 Mode.
Format.
Prescalar.
By writing to these 8 bits, a value is loaded into the postscalar. Writing 0 to these bits is interpreted as a 1.
By reading these 8 bits, the current value of the counter is loaded.
Set to enable Timer1 postscalar. If enabled, an interrupt is generated after T1CON[31:24] periods, as defined by T1LD.
Cleared to disable Timer1 postscalar.
Set if the number of Timer1 overflows is equal to the number written to the postscalar.
Set to select interrupt generation from postscalar counter.
Cleared to select interrupt generation direct from Timer1.
Set by user to enable time capture of an event.
Cleared by user to disable time capture of an event.
000 = core clock (default).
001 = low power 32.768 kHz oscillator.
010 = GPIO_8.
011 = GPIO_5.
Set by user for Timer1 to count up.
Cleared by user for Timer1 to count down (default).
Set by user to enable Timer1.
Cleared by user to disable Timer1 (default).
Set by user to operate in periodic mode.
Cleared by user to operate in free-running mode (default).
00 = binary (default).
01 = reserved.
10 = hours:minutes:seconds:hundredths—23 hours to 0 hour.
11 = hours:minutes:seconds:hundredths—255 hours to 0 hour.
0000 = source clock/1 (default).
0100 = source clock/16.
1000 = source clock/256.
1111 = source clock/32,768.
Rev.0 | Page 72 of 116
Timer1 Control Register
Name: T1CON
Address: 0xFFFF0328
Default Value: 0x01000000
Access: Read/write
Function: This 32-bit MMR configures the mode of operation
of Timer1.