EVAL-ADUC7032QSPZ Analog Devices Inc, EVAL-ADUC7032QSPZ Datasheet - Page 91

• Manufacturer Part Number: EVAL-ADUC7032QSPZ
• Description: EVAL DEV QUICK START ADUC7032
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ PLUS Kitr
• Type: MCUr

Specifications of EVAL-ADUC7032QSPZ

• Contents: Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
• For Use With/related Products: ADuC7032
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

High Voltage Interrupt Status Register
Name: HVSTA
Address: Indirectly addressed via the HVCON high voltage interface
Default Value: 0x00
Access: Read only. This register should be read only on a high voltage interrupt.
Function: This 8-bit, read-only register reflects a change of state of all the corresponding bits in the HVMON register. This register is not
an MMR and does not appear in the MMR memory map. It is accessed via the HVCON registered interface, and data is read back from
this register via HVDAT. It should be noted that in response to a high voltage interrupt event, the high voltage interrupt controller
simultaneously and automatically loads the current value of the high voltage status register (HVSTA) into the HVDAT register.
Table 76. HVSTA Bit Designations
Bit
7 to 6
5
4
3
2
1
0
Description
Reserved. These bits should not be used and are reserved for future use.
Note that this bit is not latched, and the IRQ needs to be enabled to detect it.
WU Request Status Bit. (Valid only if enabled via HVCFG1[4].)
Overtemperature. Always enabled.
LIN Short-Circuit Status Flag.
WU Short-Circuit Status Flag.
PSM Status Bit. (Valid only if enabled via HVCFG0[3].)
Reserved. This bit is reserved and should be written as 0 by user code.
This bit is 0 if the voltage at the VDD pin remains above 6.0 V.
This bit is 1 if the voltage at the VDD pin drops below 6.0 V.
Once enabled via HVCFG1[4], this bit is set to 1 to indicate that a rising or falling edge transition on the WU pin has generated a
high voltage interrupt.
This bit is 0 if a thermal shutdown event has not occurred.
This bit is 1 if a thermal shutdown event has occurred.
This bit is 0 during normal LIN operation.
This bit is 1 if a LIN short circuit is detected; in this condition, the LIN driver is automatically disabled.
This bit is 0 during normal WU operation.
This bit is 1 if a WU short circuit is detected.
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ADuC7032-8L