CY8CKIT-001 Cypress Semiconductor Corp, CY8CKIT-001 Datasheet - Page 111

• Manufacturer Part Number: CY8CKIT-001
• Description: KIT DEV FOR PSOC3/5
• Manufacturer: Cypress Semiconductor Corp
• Series: PSoC® CapSenser
• Type: MCUr

Specifications of CY8CKIT-001

• Contents: Board, CD, CY8C29 & CY8C38 Modules, MiniProg3 Programmer/Debugger, Power Supply
• Processor To Be Evaluated: CY8C29, CY8C38
• Interface Type: RS-232, USB, JTAG
• Operating Supply Voltage: 3.3 V, 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PSoC 1, PSoC 3 and PSoC 5
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2961

A.1.6.3
A.1.6.4
CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. **
designer to tie the HW_RESET line either high or low, depending on which direction the processor
reset is active.
Note PSoC1 devices are active high reset. Therefore, a light pull-down resistor may be necessary
on the XRES pin of designs with these devices to avoid unintentional device resets. PSoC3 and
PSoC5 devices are active low reset. Therefore, a light pull-up resistor may be necessary on the
XRES pin of designs with these devices to avoid unintentional device resets.
U8 - External MHz Oscillator
The board supports the use of an external high frequency 8-pin PDIP oscillator. The speed of the
oscillator supported is dependent on the specifications of the PSoC device used.
P1, P2, P3 and P4 - Processor Module Receptacles
Processor modules provide modularity to this board. Sockets P1-P4 are used to connect a processor
module to the board. All supported GPIOs (including special I/Os), along with VDD DIG, VDD ANLG,
5V, 3.3V, VBUS and VBAT (only connected to a surface mount pad on the board) are connected to
these receptacles. In addition, each of the VDDIO power pins are connected to these receptacles.
The full speed USB D+ and D- signals are also connected to one of the sockets. Processor reset is
connected to P1. Any “no connect” pins are brought out to surface mount test pads.
Figure A-8. Mechanical Layout Details for Processor Module Connector
Board Specifications and Layout
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