MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 142

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.9 PowerPC OEA Register Set
3.9.1 Machine State Register (MSR)
MPC555
USER’S MANUAL
MSR — Machine State Register
MSB
NOTES:
EE
16
0
0
0
RESET:
RESET:
The PowerPC operating environment architecture (OEA) includes a number of SPRs
and other registers that are accessible only by supervisor-level instructions. Some
SPRs are RCPU-specific; some RCPU SPRs may not be implemented in other Pow-
erPC processors, or may not be implemented in the same way.
The machine state register is a 32-bit register that defines the state of the processor.
When an exception occurs, the current contents of the MSR are loaded into SRR1,
and the MSR is updated to reflect the exception-processing machine state. The MSR
can also be modified by the mtmsr, sc, and rfi instructions. It can be read by the mfm-
sr instruction.
Table 3-12
1. Reset value of this bit depends on the value of the internal data bus line during reset.
2. This bit is only available on the MPC556.
PR
17
/
1
0
0
MPC556
FP
18
2
0
0
shows the bit definitions for the MSR.
ME
19
U
3
0
FE0
20
4
0
0
SE
21
5
0
0
CENTRAL PROCESSING UNIT
RESERVED
Rev. 15 October 2000
BE
22
6
0
0
FE1
23
7
0
0
24
8
0
0
0
ID1
25
IP
9
0
1
10
26
IR
0
0
DR
11
27
0
0
SERVED
RE-
12
28
0
0
MPEN
POW
DC-
13
29
0
0
2
MOTOROLA
14
30
RI
0
0
0
LSB
ILE
LE
15
31
3-20
0
0

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