MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 608

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
CANICR — TouCAN Interrupt Configuration Register
16.7.2 TouCAN Test Configuration Register
CANTCR — TouCAN Test Configuration Register
16.7.3 TouCAN Interrupt Configuration Register
MPC555
USER’S MANUAL
MSB
Bit(s)
12:15
0
0
RESET:
10
11
9
This register is used for factory test only.
1
0
/
SELFWAKE
STOPACK
MPC556
RESERVED
Name
APS
2
0
Table 16-11 TCNMCR Bit Descriptions (Continued)
3
0
Self wake enable. This bit allows the TouCAN to wake up when bus activity is detected after
the STOP bit is set. If this bit is set when the TouCAN enters low-power stop mode, the Tou-
CAN will monitor the bus for a recessive to dominant transition. If a recessive to dominant
transition is detected, the TouCAN immediately clears the STOP bit and restarts its clocks.
If a write to CANMCR with SELFWAKE set occurs at the same time a recessive-to-dominant
edge appears on the CAN bus, the bit will not be set, and the module clocks will not stop.
The user should verify that this bit has been set by reading CANMCR. Refer to
Power Stop Mode
0 = Self wake disabled
1 = Self wake enabled
Auto power save. The APS bit allows the TouCAN to automatically shut off its clocks to save
power when it has no process to execute, and to automatically restart these clocks when it
has a task to execute without any CPU intervention.
0 = Auto power save mode disabled; clocks run normally
1 = Auto power save mode enabled; clocks stop and restart as needed
Stop acknowledge. When the TouCAN is placed in low-power stop mode and shuts down its
clocks, it sets the STOPACK bit. This bit should be polled to determine if the TouCAN has
entered low-power stop mode. When the TouCAN exits low-power stop mode, the
STOPACK bit is cleared once the TouCAN’s clocks are running.
0 = The TouCAN is not in low-power stop mode and its clocks are running
1 = The TouCAN has entered low-power stop mode and its clocks are stopped
Reserved
4
0
CAN 2.0B CONTROLLER MODULE
5
0
for more information on entry into and exit from low-power stop mode.
IRL
Rev. 15 October 2000
6
0
7
0
8
0
ILBS
Description
9
0
10
0
11
0
0x30 7082, 0x30 7482
RESERVED
12
1
13
1
0x30 7084
0x30 7484
MOTOROLA
16.5.2 Low-
14
1
16-26
LSB
15
1

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