MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 182

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.3.4 Memory Organization
MPC555
USER’S MANUAL
Left Stream
In order to enhance performance, the logic is built to decode two halves of an instruc-
tion in parallel. The memory is arranged to support this as two streams of compressed
symbols: the left stream for the compressed symbols of X1 and X2 bytes, and the right
stream for the compressed symbols of X3 and X4 bytes.
In
tion.
Instruction
Code
Address
Figure
Figure 4-4 Two Streams Memory Organization — Before Compression
Base
Figure 4-5 Two Streams Memory Organization — After Compression
/
Figure
MPC556
Left Stream
4-4, each left and right stream line includes two original bytes of the instruc-
0
4-5, shows the memory after compressed streams have been put into it.
0
Left Bit Pointer
X1, X2
Rev. 15 October 2000
1112
BURST BUFFER
15 16
1819
X3, X4
Right Stream
Boundary Bit Field
Right Bit Pointer
30 31
31
Right Stream
1
0
0
0
1
1
0
1
1
0
1
MOTOROLA
4-6