MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 45

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Page
Table
Number
Number
19-3 CMFTST Bit Descriptions .................................................................................. 19-8
19-4 CMF Programming Algorithm (v6 and Later)..................................................... 19-8
19-5 CMF Erase Algorithm (v6) ................................................................................. 19-9
19-6 CMFCTL Bit Descriptions ................................................................................ 19-10
19-7 EEPROM Array Addressing............................................................................. 19-12
19-8 CMF EEPROM Array Address Fields .............................................................. 19-12
19-9 Program Interlock State Descriptions .............................................................. 19-21
19-10 Results of Programming Margin Read........................................................... 19-22
19-11 Erase Interlock State Descriptions................................................................. 19-26
19-12 System Clock Range ..................................................................................... 19-28
19-13 Clock Period Exponent and Pulse Width Range ........................................... 19-29
19-14 Censorship Control Bits ................................................................................. 19-31
19-15 Levels of Censorship ..................................................................................... 19-32
19-16 CMF EEPROM Devices Modes and Censorship Status ............................... 19-33
19-17 NVM Fuse States........................................................................................... 19-34
20-1 SRAMMCR Bit Descriptions ............................................................................. 20-3
21-1 VF Pins Instruction Encodings.......................................................................... 21-3
21-2 VF Pins Queue Flush Encodings....................................................................... 21-4
21-3 VFLS Pin Encodings.......................................................................................... 21-4
21-4 Detecting the Trace Buffer Start Point ............................................................... 21-7
21-5 Fetch Show Cycles Control ............................................................................... 21-8
21-6 Instruction Watchpoints Programming Options ............................................... 21-17
21-7 Load/Store Data Events................................................................................... 21-18
21-8 Load/Store Watchpoints Programming Options .............................................. 21-19
21-9 The Check Stop State and Debug Mode ......................................................... 21-29
21-10 Trap Enable Data Shifted into Development Port Shift Register ................... 21-38
21-11 Debug Port Command Shifted Into Development Port Shift Register ........... 21-38
21-12 Status / Data Shifted Out of Development Port Shift Register....................... 21-39
21-13 Debug Instructions / Data Shifted Into Development Port Shift Register....... 21-40
21-14 Development Support Programming Model................................................... 21-44
21-15 Development Support Registers Read Access Protection ............................ 21-45
21-16 Development Support Registers Write Access Protection............................. 21-45
21-17 CMPA-CMPD Bit Descriptions....................................................................... 21-45
21-18 CMPE-CMPF Bit Descriptions ....................................................................... 21-46
21-19 BAR Bit Descriptions ..................................................................................... 21-46
21-20 CMPG-CMPH Bit Descriptions ...................................................................... 21-46
21-21 ICTRL Bit Descriptions .................................................................................. 21-48
21-22 ISCT_SER Bit Descriptions ........................................................................... 21-49
21-23 LCTRL1 Bit Descriptions ............................................................................... 21-50
21-24 LCTRL2 Bit Descriptions ............................................................................... 21-51
21-25 Breakpoint Counter A Value and Control Register (COUNTA)...................... 21-52
21-26 Breakpoint Counter B Value and Control Register (COUNTB)..................... 21-53
21-27 ECR Bit Descriptions ..................................................................................... 21-54
21-28 DER Bit Descriptions ..................................................................................... 21-55
MPC555 / MPC556
LIST OF TABLES
MOTOROLA
USER’S MANUAL
Rev. 15 October 2000
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