MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 310

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
9.5.2.3 Single Beat Flow with Small Port Size
MPC555
USER’S MANUAL
CLKOUT
BR
BG
BB
ADDR[0:31]
RD/WR
TSIZ[0:1]
BURST, BDIP
TS
Data
TA
The general case of single beat transfers assumes that the external memory has a 32-
bit port size. The MPC555 / MPC556 provides an effective mechanism for interfacing
with 16-bit and 8-bit port size memories, allowing transfers to these devices when they
are controlled by the internal memory controller.
In this case, the MPC555 / MPC556 attempts to initiate a transfer as in the normal
case. If the bus interface receives a small port size (16 or 8 bits) indication before the
transfer acknowledge to the first beat (through the internal memory controller), the
MCU initiates successive transactions until the completion of the data transfer. Note
that all the transactions initiated to complete the data transfer are considered to be part
of an atomic transaction, so the MCU does not allow other unrelated master accesses
/
MPC556
Figure 9-9 Single Beat Basic Write Cycle Timing, One Wait State
O
O
Receive bus grant and bus busy negated
EXTERNAL BUS INTERFACE
O
O
Rev. 15 October 2000
Assert BB, drive address and assert TS
Wait state
O
Data is sampled
MOTOROLA
9-14

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