m41st87w STMicroelectronics, m41st87w Datasheet
m41st87w
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m41st87w Summary of contents
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... SECURITY FEATURES TAMPER INDICATION CIRCUITS WITH 2 TIMESTAMP AND RAM CLEAR C BUS LPSRAM CLEAR FUNCTION (TP PACKAGING INCLUDES A 28-LEAD, EMBEDDED CRYSTAL SOIC OSCILLATOR STOP DETECTION Figure 1. Package V 4.75V PFD V 4.50V PFD 3.0V PFD V 2.70V PFD M41ST87Y M41ST87W ) CLR EMBEDDED Crystal 28-pin, (300mil) SOX28 (MX) Rev 6 1/42 ...
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... M41ST87Y, M41ST87W TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SECURITY FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Package SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Security Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. 28-pin, 300mil SOIC (MX) Connections Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 5. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 OPERATING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2-Wire Bus Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 6. Serial Bus Data Transfer Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 7 ...
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... Table 12. t Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 rec Table 13. Default Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 MAXIMUM RATING Table 14. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 15. DC and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 27.AC Testing Input/Output Waveforms Table 16. Capacitance Table 17. DC Characteristics Figure 28.Power Down/Up Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 18. Power Down/Up AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 M41ST87Y, M41ST87W 3/42 ...
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... M41ST87Y, M41ST87W PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 29.SOX28 – 28-lead Plastic Small Outline, 300mils, Embedded Crystal Outline Table 19. SOX28 – 28-lead Plastic Small Outline, 300mils, Embedded Crystal, Mechanical Data 39 PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 20. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 REVISION HISTORY Table 21. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 4/42 ...
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... The M41ST87Y/W is supplied in a 28-pin, 300mil SOIC package (MX) which includes an embedded 32kHz crystal. The SOIC package is shipped in plastic anti-static tubes or in Tape & Reel form. The 300mil, embedded crystal SOIC requires only a user-supplied battery to provide non-volatile op- eration. M41ST87Y, M41ST87W 5/42 ...
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... M41ST87Y, M41ST87W Figure 2. Logic Diagram V BAT V CC SCL SDA EX RSTIN1 RSTIN2 M41ST87Y M41ST87W WDI PFI 1 PFI 2 TP1 IN TP2 Note: 1. Open drain output 2. Programmable output (Open drain or Full-CMOS) Figure 3. 28-pin, 300mil SOIC (MX) Connections PFO 2 7 M41ST87Y ...
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... BYTES ROM INTERFACE RTC w/ALARM & CALIBRATION WATCHDOG 32KHz OSCILLATOR SQUARE WAVE CLR X COMPARE V BL COMPARE V SO COMPARE V PFD COMPARE COMPARE = 0V (during battery back-up mode). CC M41ST87Y, M41ST87W OFIE AFE WDS TIE X TAMPER CLRX EXT BL POR (1) IRQ/OUT (2) SQW/FT TP CLR V OUT (1) F 32k (1) ...
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... M41ST87Y, M41ST87W Figure 5. Hardware Hookup Inhibit Unregulated V Voltage IN 5V Regulator Inhibit V IN 3.3V Regulator For monitoring of additional voltage sources Pushbutton 8/42 M41ST87Y TP1 IN TP2 SCL WDI RSTIN1 RSTIN2 Reset PFI 1 PFI BAT TP CLR V V OUT ...
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... High to Low, while the clock is High, CC defines the START condition. Stop data transfer. A change in the state of the data line, from Low to High, while the clock is High, defines the STOP condition. M41ST87Y, M41ST87W , the battery is disconnected reaches V CC PFD ...
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... M41ST87Y, M41ST87W Data Valid. The state of the data line represents valid data when after a start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line may be changed during the Low period of the clock signal. There is one clock pulse per bit of data ...
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... Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling edge of SCL. tHD:STA tR tF tHIGH tSU:DAT tLOW tHD:DAT (1) Parameter = –40 to 85° 4.5 to 5.5V or 2.7 to 3.6V (except where noted M41ST87Y, M41ST87W tHD:STA tSU:STA tSU:STO SR P AI00589 Min Max 0 400 1.3 M41ST87Y 10 ...
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... M41ST87Y, M41ST87W READ Mode In this mode the master reads the M41ST87Y/W slave after setting the slave address (see 9., page 12). Following the WRITE Mode Control Bit (R/W=0) and the Acknowledge Bit, the word address 'An' is written to the on-chip address pointer. Next the START condition and slave ad- dress are repeated followed by the READ Mode Control Bit (R/W=1) ...
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... Figure 10. READ Mode Sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS DATA n+X Figure 11. Alternate READ Mode Sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS WORD S ADDRESS (An) SLAVE ADDRESS P DATA n DATA n+1 M41ST87Y, M41ST87W DATA n DATA n+1 AI00899 DATA n+X P AI00895 13/42 ...
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... M41ST87Y, M41ST87W WRITE Mode In this mode the master transmitter transmits to the M41ST87Y/W slave receiver. Bus protocol is shown in Figure 12., page START condition and slave address, a logic '0' (R/ W=0) is placed on the bus and indicates to the ad- dressed device that word address An will follow and written to the on-chip address pointer. ...
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... SRAM are maintained from the attached battery supply. All outputs become high impedance. The V is capable of supplying 100µA (for M41ST87W) or 150µA (for M41ST87Y) of current to the attached memory with less than 0.3 volts drop under this condition ...
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... M41ST87Y, M41ST87W Tamper Connect Mode Bit (TCM1 and TCM2). This bit indicates whether the position of the exter- nal switch selected by the user is in the Normally Open (TCM = '1 (TCM = '0') position (see Figure 14., page 16 X Figure 16., page 17). Figure 14. Tamper Detect Connection Options I ...
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... NORMALLY OPEN ) TAMPER LO, NORMALLY CLOSED TAMPER LO OUT NORMALLY OPEN TAMPER HI, NORMALLY CLOSED M41ST87Y, M41ST87W IRQ - Interrupt the processor on tamper TP - Clear external CLR RAM on tamper RESET OUT CLR - Clear 128 bytes internal RAM on tamper Time stamp tamper event (to RTC) AI07821 ...
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... M41ST87Y, M41ST87W Tamper Detect Sampling (TDS1 and TDS2). This bit selects between a 1Hz sampling rate or constant monitoring of the Tamper Input Pin(s) to detect a tamper event when the Normally Closed switch mode is selected. This allows the user to re- duce the current drain when the TEB abled while the device is in battery backup (see Table 4 ...
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... MONITORING CONTINUOUS MONITORING SAMPLED MONITORING CONTINUOUS MONITORING OUT CONTINUOUS MONITORING SAMPLED MONITORING TCHI/TCLO = 0 1M 10M OUT 1M 10M TCHI/TCLO = 0 M41ST87Y, M41ST87W TDS = 0 X User Configuration TDS = 1 X TCM , TPM X X TDS = 0 X TDS = 1 X AI07819 CONTINUOUS MONITORING TDS = 0 CONTINUOUS X User ...
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... M41ST87Y, M41ST87W Figure 19. Tamper Output Timing (with CLR1 TP CLR RST (1) V OUT (3) IRQ/OUT E CON Tamper Event (TB Bit set) Note connected to a negative charge pump device, this pin must be isolated from the charge pump by using both n-channel and p- channel MOSFETs as illustrated the device is in battery back-up ...
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... RSTIN2 PFO 1 PFI 1 PFO 2 PFI 2 IRQ/OUT BAT 32k pin from the negative voltage generated by the inverting Charge Pump. OUT M41ST87Y, M41ST87W Inverting Charge Pump Negative Output IN OUT (– SHDN (1) CAP+ CAP– ( Low-Power SRAM To RST To LED Display ...
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... M41ST87Y, M41ST87W Tamper Detection Operation The Tamper Pins are triggered based on the state of an external switch. Two switch mode options are available, “Normally Open” or “Normally Closed,” based on the setting of the Tamper Con- nect Mode Bit (TCM ). If the selected switch mode ...
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... Stamp, page not be set during the power-down event. If both are needed, the Power Down Time-Stamp may be accomplished by writing the time into the General ) by X Purpose RAM memory space when PFO is assert ed. M41ST87Y, M41ST87W 6.28µs 159.2Hz 6.28ms 31.8kHz 31.4µs 31 ...
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... M41ST87Y, M41ST87W CLOCK OPERATION The eight byte clock register (see 7., page 25) is used to both set the clock and to read the date and time from the clock binary coded decimal format. Tenths/Hundredths of Sec- onds, Seconds, Minutes, and Hours are contained within the first four registers. ...
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... TDS (1 and 2) = Tamper Detect Sampling Bits TEB (1 and 2) = Tamper Enable Bits THS = Threshold Bit TIE (1 and 2) = Tamper Interrupt Enable Bits TPM (1 and 2) = Tamper Polarity Mode Bits WDS = Watchdog Steering Bit WDF = Watchdog flag (Read only) M41ST87Y, M41ST87W Function/Range BCD Format 10s/100s 0.01 Seconds ...
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... M41ST87Y, M41ST87W Calibrating the Clock The M41ST87Y/W is driven by a quartz controlled oscillator with a nominal frequency of 32,768Hz. The devices are tested not exceed ±35 ppm (parts per million) oscillator frequency error at 25 which equates to about ±1.53 minutes per month. When the Calibration circuit is properly employed, accuracy improves to better than ± ...
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... Figure 23. Calibration Waveform NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION – –0.036 ppm ± – Temperature C M41ST87Y, M41ST87W 2 2 ± 0.006 ppm AI07888 AI00594B 27/42 ...
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... M41ST87Y, M41ST87W Setting Alarm Clock Registers Address locations 0Ah-0Eh contain the alarm set- tings. The alarm can be configured to go off at a prescribed time on a specific month, date, hour, minute, or second, or repeat every year, month, day, hour, minute, or second. It can also be pro- grammed to go off while the M41ST87Y the battery back-up to serve as a system wake-up call ...
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... A READ of the Flags Register will reset the Watchdog Flag (Bit D7; Register 0Fh). pin IRQ/OUT The watchdog function is automatically disabled upon power-up and the Watchdog Register is cleared. M41ST87Y, M41ST87W trec HIGH-Z AI07087 pin. This will also disable the IRQ/OUT if not SS ...
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... M41ST87Y, M41ST87W Square Wave Output The M41ST87Y/W offers the user a programma- ble square wave function which is output on the SQW/FT pin. RS3-RS0 bits located in 13h estab- lish the square wave output frequency. These fre- quencies are listed in Table 9. Once the selection of the SQW frequency has been completed, the ...
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... RSTIN1 and RSTIN2 are each internally pulled resistor. 34). tR2 Hi-Z trec (1) Parameter = –40 to 85° 4.5 to 5.5V or 2.7 to 3.6V (except where noted 33). Same function as Power-on Reset. M41ST87Y, M41ST87W 10 and Figure and t will not gener through a 100k CC Hi-Z trec AI07072 Min Max ...
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... M41ST87Y, M41ST87W Power-fail Comparators (1 and 2) Two Power-Fail Inputs (PFI 1 pared to an internal reference voltage (1.25V). If either PFI or PFI is less than the power-fail 1 2 threshold (V ), the associated Power-Fail Output PFI (PFO or PFO ) will go low. This function is intend for use as an under-voltage detector to signal a failing power supply ...
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... Note: The ABE Bit must be set to '1' for the IRQ/ OUT pin to be activated in battery back-up. or battery is insuffi- Initial Power-on Defaults See Table 13., page CB1 Leap Year STOP Bit (ST M41ST87Y, M41ST87W 34. Example Yes 2000 No 2100 No 2200 No 2300 t Time rec Min Max ...
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... M41ST87Y, M41ST87W Table 13. Default Values Condition TR Initial Power-up Subsequent Power-up (with UC (1,2) battery back-up) Condition Initial Power-up Subsequent Power-up (with (1,2) battery back-up) Condition Initial Power-up Subsequent Power-up (with (1) battery back-up) TCHI/TCLO1 Condition Initial Power-up Subsequent Power-up (with (1) battery back-up) Note: All other control bits are undetermined. ...
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... Exposure to Absolute Maximum Rat- ing conditions for extended periods may affect de- vice reliability. STMicroelectronics SURE Program and other rel- evant quality documents. Parameter Off, Oscillator Off) CC M41ST87Y M41ST87W M41ST87Y, M41ST87W Refer also to the Value Unit –55 to 125 °C 240 °C – ...
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... Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages Note: Output High Z is defined as the point where data is no longer driven. Figure 27. AC Testing Input/Output Waveforms 0.8V CC 0.2V CC Note: 50pF for M41ST87W. Table 16. Capacitance Symbol C Input Capacitance IN (3) ...
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... A CC open. Not including Tamper Detection Current (see through 100K resistor. WDI internally pulled-down specification. CC (max) may be considered 2.9V. BAT and PFO (if PFOD = '1'), RST, SDA, and M41ST87Y, M41ST87W M41ST87W Typ Max Min Typ 500 700 500 50 50 1.4 1 ± – ...
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... M41ST87Y, M41ST87W Figure 28. Power Down/Up Mode AC Waveforms PFD (max) V PFD (min tPD PFO VALID INPUTS RECOGNIZED RST OUTPUTS VALID (PER CONTROL INPUT) E CON Table 18. Power Down/Up AC Characteristics Symbol (2) V (max PFD PFD F (3) V (min PFD SS FB ...
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... millimeters Min Max 2.44 2.69 0.15 0.31 2.29 2.39 0.41 0.51 0.20 0.31 17.91 18.01 0.10 7.57 7.67 – – 10.16 10.52 0.51 0.81 0° 8° 28 M41ST87Y, M41ST87W ddd A1 inches Typ Min 0.096 0.006 0.090 0.016 0.008 0.705 0.298 0.050 – 0.400 0.020 0° Max 0.106 0.012 0.094 0.020 0.012 0.709 0.004 0.302 – 0.414 0.032 8° ...
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... M41ST87Y, M41ST87W PART NUMBERING Table 20. Ordering Information Scheme Example: Device Type M41ST Supply Voltage and Write Protect Voltage 87Y = V = 4.75 to 5.5V CC THS Bit = '1': 4.50V V PFD = 4 THS Bit = '0': 4.20V V PFD 87W = V = 3.0 to 3.6V; CC THS Bit = '1': 2.80V V PFD V = 2.7 to 3.6V; CC THS Bit = '0': 2.55V V PFD Package ...
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... Reformatted; added Lead-free information; updated characteristics (Figure 3; Table 1, 14, 15-Jun-04 3.0 17, 20) 7-Sep-04 4.0 Update Maximum Ratings (Table 14) Clarify NC connections, add Inadvertent Tamper, update MX attribute (Figure 3, 21; Table 29-Jun- 20) 28-mar-06 6 Update to “Avoiding Inadvertent Tamper paragraph“ paragraph M41ST87Y, M41ST87W Revision Details 41/42 ...
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... M41ST87Y, M41ST87W Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...