DSPIC33FJ32GS406-I/PT Microchip Technology, DSPIC33FJ32GS406-I/PT Datasheet - Page 295

• Manufacturer Part Number: DSPIC33FJ32GS406-I/PT
• Description: IC MCU/DSP 32KB FLASH 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GS406-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SCI, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, QEI, POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Core Frequency: 40MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 53
• Flash Memory Size: 32KB
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 21-17: CiRXFnEID: ECAN™ ACCEPTANCE FILTER EXTENDED IDENTIFIER REGISTER
REGISTER 21-18: CiFMSKSEL1: ECAN™ FILTER 7-0 MASK SELECTION REGISTER
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-12
bit 11-10
bit 9-8
bit 7-6
bit 5-4
bit 3-2
bit 1-0
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
R/W-0
R/W-0
R/W-x
EID15
R/W-x
EID7
F7MSK<1:0>
F3MSK<1:0>
EID<15:0>: Extended Identifier bits
1 = Message address bit EIDx must be ‘1’ to match filter
0 = Message address bit EIDx must be ‘0’ to match filter
F7MSK<1:0>: Mask Source for Filter 7 bits
11 = Reserved
10 = Acceptance Mask 2 registers contain mask
01 = Acceptance Mask 1 registers contain mask
00 = Acceptance Mask 0 registers contain mask
F6MSK<1:0>: Mask Source for Filter 6 bits (same values as bit 15-14)
F5MSK<1:0>: Mask Source for Filter 5 bits (same values as bit 15-14)
F4MSK<1:0>: Mask Source for Filter 4 bits (same values as bit 15-14)
F3MSK<1:0>: Mask Source for Filter 3 bits (same values as bit 15-14)
F2MSK<1:0>: Mask Source for Filter 2 bits (same values as bit 15-14)
F1MSK<1:0>: Mask Source for Filter 1 bits (same values as bit 15-14)
F0MSK<1:0>: Mask Source for Filter 0 bits (same values as bit 15-14)
EID14
R/W-0
R/W-0
R/W-x
R/W-x
EID6
n (n = 0-15)
C = Writeable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
C = Writeable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-x
EID13
R/W-x
EID5
F6MSK<1:0>
F2MSK<1:0>
EID12
R/W-0
R/W-0
R/W-x
R/W-x
EID4
Preliminary
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-x
EID11
R/W-x
EID3
F5MSK<1:0>
F1MSK<1:0>
R/W-x
EID10
R/W-x
R/W-0
R/W-0
EID2
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
R/W-0
R/W-0
EID9
EID1
F4MSK<1:0>
F0MSK<1:0>
DS70591C-page 295
R/W-0
R/W-0
R/W-x
R/W-x
EID8
EID0
bit 8
bit 0
bit 8
bit 0