DSPIC30F6014-30I/PF Microchip Technology, DSPIC30F6014-30I/PF Datasheet - Page 136

• Manufacturer Part Number: DSPIC30F6014-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6014-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: 3-Wire/AC97/CAN/I2C/I2S/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1DM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601430IPF

TABLE 18-2:
Note:
SFR Name
DCICON1
DCICON2
DCICON3
DCISTAT
TSCON
RSCON
RXBUF0
RXBUF1
RXBUF2
RXBUF3
TXBUF0
TXBUF1
TXBUF2
TXBUF3
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Addr.
0240
0242
0244
0246
0248
024C
0250
0252
0254
0256
0258
025A
025C
025E
DCI REGISTER MAP
DCIEN
RSE15
TSE15
Bit 15
—
—
—
RSE14
TSE14
Bit 14
—
—
—
—
DCISIDL
TSE13
RSE13
Bit 13
—
—
—
TSE12
RSE12
Bit 12
—
—
—
—
DLOOP
BLEN1
SLOT3
TSE11
RSE11
Bit 11
CSCKD
BLEN0
SLOT2
RSE10
TSE10
Bit 10
Transmit Buffer #0 Data Register
Transmit Buffer #1 Data Register
Transmit Buffer #2 Data Register
Transmit Buffer #3 Data Register
Receive Buffer #0 Data Register
Receive Buffer #1 Data Register
Receive Buffer #2 Data Register
Receive Buffer #3 Data Register
CSCKE COFSD UNFM
SLOT1
RSE9
TSE9
Bit 9
—
SLOT0
RSE8
TSE8
Bit 8
RSE7
TSE7
Bit 7
COFSG<3:0>
—
CSDOM
RSE6
BCG<11:0>
TSE6
Bit 6
—
RSE5 RSE4 RSE3
DJST
TSE5
Bit 5
—
TSE4
Bit 4
—
—
—
TSE3
Bit 3
ROV
—
RFUL
TSE2
RSE2
Bit 2
—
WS<3:0>
COFSM1
TUNF
RSE1
TSE1
Bit 1
COFSM0 0000 0000 0000 0000
TMPTY
RSE0
TSE0
Bit 0
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Reset State