DSPIC30F6014-30I/PF Microchip Technology, DSPIC30F6014-30I/PF Datasheet - Page 223

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DSPIC30F6014-30I/PF

Manufacturer Part Number
DSPIC30F6014-30I/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6014-30I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
68
Flash Memory Size
144KB
Supply Voltage Range
2.5V To 5.5V
Package
80TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
68
Interface Type
3-Wire/AC97/CAN/I2C/I2S/SPI/UART
On-chip Adc
16-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F601430IPF

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S
Serial Peripheral Interface. See SPI.
Simple Capture Event Mode ............................................... 83
Simple OC/PWM Mode Timing Requirements.................. 192
Simple Output Compare Match Mode................................. 88
Simple PWM Mode ............................................................. 88
Software Simulator (MPLAB SIM)..................................... 170
Software Stack Pointer, Frame Pointer............................... 16
SPI ...................................................................................... 91
SPI Module ......................................................................... 91
Status Bits, Their Significance and the Initialization
Status Bits, Their Significance and the Initialization
Status Register ................................................................... 16
Symbols Used in Opcode Descriptions............................. 162
System Integration ............................................................ 145
T
Table Instruction Operation Summary ................................ 51
Temperature and Voltage Specifications
Timer1 Module .................................................................... 69
Timer2 and Timer3 Selection Mode .................................... 88
© 2006 Microchip Technology Inc.
Buffer Operation.......................................................... 84
Hall Sensor Mode ....................................................... 84
Prescaler..................................................................... 83
Timer2 and Timer3 Selection Mode............................ 84
Input Pin Fault Protection............................................ 88
Period.......................................................................... 89
Call Stack Frame ........................................................ 35
Framed SPI Support ................................................... 91
Operating Function Description .................................. 91
Operation During CPU Idle Mode ............................... 93
Operation During CPU Sleep Mode............................ 93
SDOx Disable ............................................................. 91
Slave Select Synchronization ..................................... 93
SPI1 Register Map...................................................... 94
SPI2 Register Map...................................................... 94
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 91
Condition for RCON Register, Case 1 ...................... 154
Condition for RCON Register, Case 2 ...................... 155
Register Map............................................................. 159
AC ............................................................................. 182
16-bit Asynchronous Counter Mode ........................... 69
16-bit Synchronous Counter Mode ............................. 69
16-bit Timer Mode....................................................... 69
Gate Operation ........................................................... 70
Interrupt....................................................................... 71
Operation During Sleep Mode .................................... 70
Prescaler..................................................................... 70
Real-Time Clock ......................................................... 71
Register Map............................................................... 72
Master Mode (CKE = 0) .................................... 196
Master Mode (CKE = 1) .................................... 197
Slave Mode (CKE = 1) .............................. 198, 200
Master Mode (CKE = 0) .................................... 196
Master Mode (CKE = 1) .................................... 198
Slave Mode (CKE = 0) ...................................... 199
Slave Mode (CKE = 1) ...................................... 200
Interrupts............................................................. 71
Oscillator Operation ............................................ 71
dsPIC30F6011A/6012A/6013A/6014A
Timer2/3 Module................................................................. 73
Timer4/5 Module................................................................. 79
Timing Characteristics
Timing Diagrams
Timing Diagrams.See Timing Characteristics
16-bit Timer Mode ...................................................... 73
32-bit Synchronous Counter Mode............................. 73
32-bit Timer Mode ...................................................... 73
ADC Event Trigger ..................................................... 76
Gate Operation ........................................................... 76
Interrupt ...................................................................... 76
Operation During Sleep Mode .................................... 76
Register Map .............................................................. 77
Timer Prescaler .......................................................... 76
Register Map .............................................................. 81
A/D Conversion
Band Gap Start-up Time........................................... 188
CAN Module I/O ....................................................... 205
CLKO and I/O ........................................................... 186
DCI Module
External Clock .......................................................... 182
I
I
Input Capture (CAPX)............................................... 191
OC/PWM Module...................................................... 192
Oscillator Start-up Timer........................................... 187
Output Compare Module .......................................... 191
Power-up Timer ........................................................ 187
Reset ........................................................................ 187
SPI Module
Type A, B and C Timer External Clock ..................... 189
Watchdog Timer ....................................................... 187
CAN Bit..................................................................... 116
Frame Sync, AC-Link Start of Frame ....................... 128
Frame Sync, Multi-Channel Mode ............................ 128
I
PWM Output ............................................................... 89
Time-out Sequence on Power-up (MCLR
Time-out Sequence on Power-up (MCLR
Time-out Sequence on Power-up (MCLR
2
2
2
C Bus Data
C Bus Start/Stop Bits
S Interface Frame Sync ......................................... 128
Low-speed (ASAM = 0, SSRC = 000) .............. 208
AC-Link Mode................................................... 195
Multichannel, I
Master Mode..................................................... 201
Slave Mode ...................................................... 203
Master Mode..................................................... 201
Slave Mode ...................................................... 203
Master Mode (CKE = 0).................................... 196
Master Mode (CKE = 1).................................... 197
Slave Mode (CKE = 0)...................................... 198
Slave Mode (CKE = 1)...................................... 200
Not Tied to V
Not Tied to V
Tied to V
DD
)...................................................... 152
DD
DD
2
S Modes................................... 193
), Case 1.................................. 152
), Case 2.................................. 152
DS70143C-page 221

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