DSPIC30F6014-30I/PF Microchip Technology, DSPIC30F6014-30I/PF Datasheet - Page 141

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DSPIC30F6014-30I/PF

Manufacturer Part Number
DSPIC30F6014-30I/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6014-30I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
68
Flash Memory Size
144KB
Supply Voltage Range
2.5V To 5.5V
Package
80TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
68
Interface Type
3-Wire/AC97/CAN/I2C/I2S/SPI/UART
On-chip Adc
16-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F601430IPF

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The following figure depicts the recommended circuit
for the conversion rates above 200 ksps. The
dsPIC30F6014 is shown as an example.
FIGURE 19-2:
The configuration procedures below give the required
setup values for the conversion speeds above 100
ksps.
19.7.1
The following configuration items are required to
achieve a 200 ksps conversion rate.
• Comply with conditions provided in Table 19-2.
• Connect external V
• Set SSRC<2.0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Write the SMPI<3.0> control bits in the ADCON2
© 2006 Microchip Technology Inc.
the recommended circuit shown in Figure 19-2.
enable the auto convert option.
control bit in the ADCON1 register.
register for the desired number of conversions
between interrupts.
C2
0.1 F
R2
10
V
DD
V
DD
200 KSPS CONFIGURATION
GUIDELINE
C1
0.01 F
REF
ADC VOLTAGE REFERENCE SCHEMATIC
1
2
3
4
5
6
7
8
9
10
V
V
13
14
15
16
17
18
19
20
+ and V
SS
DD
R1
10
REF
- pins following
dsPIC30F6011/6012/6013/6014
V
DD
dsPIC30F6014
V
DD
Note 1: Ensure adequate bypass capacitors are provided on each V
V
DD
• Configure the ADC clock period to be:
• Configure the sampling time to be 1 T
The following figure shows the timing diagram of the
ADC running at 200 ksps. The T
tion with the guidelines described above allows a con-
version speed of 200 ksps. See Example 19-1 for code
example.
by writing to the ADCS<5:0> control bits in the
ADCON3 register.
writing: SAMC<4:0> = 00001.
(14 + 1) x 200,000
V
V
60
59
58
57
56
55
54
53
52
50
49
DD
47
46
45
44
43
42
41
SS
1
V
See Note 1:
DD
C8
1 F
C5
1 F
V
AV
= 334 ns
DD
AD
DD
C7
0.1 F
C4
0.1 F
selection in conjunc-
DS70117F-page 139
V
AV
DD
AD
DD
C6
0.01 F
C3
0.01 F
by
DD
V
AV
DD
pin.
DD

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