DSPIC30F6014-30I/PF Microchip Technology, DSPIC30F6014-30I/PF Datasheet - Page 196

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DSPIC30F6014-30I/PF

Manufacturer Part Number
DSPIC30F6014-30I/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6014-30I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
68
Flash Memory Size
144KB
Supply Voltage Range
2.5V To 5.5V
Package
80TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
68
Interface Type
3-Wire/AC97/CAN/I2C/I2S/SPI/UART
On-chip Adc
16-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F601430IPF

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dsPIC30F6011/6012/6013/6014
TABLE 23-29: DCI MODULE (MULTICHANNEL, I
DS70117F-page 194
AC CHARACTERISTICS
CS10
CS11
CS20
CS21
CS30
CS31
CS35
CS36
CS40
CS41
CS50
CS51
CS55
CS56
Note 1:
Param
No.
2:
3:
4:
Tc
Tc
Tc
Tc
Tc
Tc
T
T
T
T
Tco
Tco
Tsco
T
Symbol
CSDI
DV
DIV
HCSDI
HCOFS
These parameters are characterized but not tested in manufacturing.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
The minimum clock period for CSCK is 100 ns. Therefore, the clock generated in Master mode must not
violate this specification.
SCKL
SCKH
SCKF
SCKR
SDOF
SDOR
Assumes 50 pF load on all DCI pins.
FSF (1)
FSR (1)
FS
CSCK Input Low Time
(CSCK pin is an input)
CSCK Output Low Time
(CSCK pin is an output)
CSCK Input High Time
(CSCK pin is an input)
CSCK Output High Time
(CSCK pin is an output)
CSCK Output Fall Time
(CSCK pin is an output)
CSCK Output Rise Time
(CSCK pin is an output)
CSDO Data Output Fall Time
CSDO Data Output Rise Time
Clock edge to CSDO data valid
Clock edge to CSDO tri-stated
Setup time of CSDI data input to
CSCK edge (CSCK pin is input
or output)
Hold time of CSDI data input to
CSCK edge (CSCK pin is input
or output)
COFS Fall Time
(COFS pin is output)
COFS Rise Time
(COFS pin is output)
Setup time of COFS data input to
CSCK edge (COFS pin is input)
Hold time of COFS data input to
CSCK edge (COFS pin is input)
Characteristic
(1)
(4)
(3)
(4)
(3)
(4)
(4)
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
T
T
2
CY
CY
S MODES) TIMING REQUIREMENTS
Min
/2 + 20
/2 + 20
30
30
10
20
20
20
20
Typ
10
10
10
10
10
10
(2)
Max
-40°C T
-40°C
25
25
25
25
10
20
25
25
© 2006 Microchip Technology Inc.
T
Units
A
A
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
+85°C for Industrial
+125°C for Extended
Conditions

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