Z8F3222AR020SG Zilog, Z8F3222AR020SG Datasheet - Page 188

IC ENCORE MCU FLASH 32K 64LQFP

Z8F3222AR020SG

Manufacturer Part Number
Z8F3222AR020SG
Description
IC ENCORE MCU FLASH 32K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F3222AR020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
Z8F322x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4261
Z8F3222AR020SG

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PS019921-0308
DMA Control of the ADC
Follow the steps below for setting up the ADC and initiating continuous conversion:
1. Enable the desired analog input by configuring the general-purpose I/O pins for
2. Write to the ADC Control register to configure the ADC for continuous conversion.
3. When the first conversion in continuous operation is complete (after 5129 system
4. Thereafter, the ADC writes a new 10-bit data result to {ADCD_H[7:0],
5. To disable continuous conversion, clear the CONT bit in the ADC Control register
The Direct Memory Access (DMA) Controller can control operation of the ADC includ-
ing analog input selection and conversion enable. For more information on the DMA and
configuring for ADC operations, see
alternate function. This disables the digital input and output driver.
The bit fields in the ADC Control register may be written simultaneously:
clock cycles, plus the 40 cycles for power-up, if necessary), the ADC control logic
performs the following operations:
ADCD_L[7:6]} every 256 system clock cycles. An interrupt request is sent to the
Interrupt Controller when each conversion is complete.
to 0.
Write to the ANAIN[3:0] field to select one of the 12 analog input sources.
Set CONT to 1 to select continuous conversion.
Write to the VREF bit to enable or disable the internal voltage reference generator.
Set CEN to 1 to start the conversions.
CEN resets to 0 to indicate the first conversion is complete. CEN remains 0 for all
subsequent conversions in continuous operation.
An interrupt request is sent to the Interrupt Controller to indicate the conversion is
complete.
Direct Memory Access Controller
Z8 Encore! XP
Product Specification
Analog-to-Digital Converter
on page 161.
®
F64XX Series
174

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