Z8F3222AR020SG Zilog, Z8F3222AR020SG Datasheet - Page 74

• Manufacturer Part Number: Z8F3222AR020SG
• Description: IC ENCORE MCU FLASH 32K 64LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F3222AR020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: Z8F322x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4261; Z8F3222AR020SG

Table 18. Port A–H Output Control Sub-Registers
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
POC7
7
AF[7:0]—Port Alternate Function enabled
0 = The port pin is in NORMAL mode and the DDx bit in the Port A–H Data Direction
1 = The alternate function is selected. Port pin operation is controlled by the
Port A
The Port A–H Output Control sub-register
Port A–H Control register by writing
bits in the Port A–H Output Control sub-registers to 1 configures the specified port pins
for open-drain operation. These sub-registers affect the pins directly and, as a result, alter-
nate functions are also affected.
POC[7:0]—Port Output Control
These bits function independently of the alternate function bit and disables the drains if set
to 1.
0 = The drains are enabled for any output mode.
1 = The drain of the associated pin is disabled (open-drain mode).
Port A
The Port A–H High Drive Enable sub-register
H Control register by writing
Port A–H High Drive Enable sub-registers to 1 configures the specified port pins for high
current output drive operation. The Port A–H High Drive Enable sub-register affects the
pins directly and, as a result, alternate functions are also affected.
If 03H in Port A
sub-register determines the direction of the pin.
alternate function.
–
–
POC6
H Output Control Sub-Registers
H High Drive Enable Sub-Registers
6
–
H Address Register, accessible through Port A
POC5
5
04H
POC4
to the Port A–H Address register. Setting the bits in the
4
03H
R/W
0
to the Port A–H Address register. Setting the
(Table
POC3
(Table
3
18) is accessed through the
19) is accessed through the Port A–
Z8 Encore! XP
POC2
2
–
Product Specification
H Control Register
POC1
General-Purpose I/O
1
®
F64XX Series
POC0
0
60