MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 425

IC MCU 256K FLASH 25MHZ 80-QFP

MC9S12E256MFUE

Manufacturer Part Number
MC9S12E256MFUE
Description
IC MCU 256K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E256MFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
60
Number Of Timers
12
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
60
Ram Memory Size
16KB
Cpu Speed
25MHz
No. Of Timers
3
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12E256MFUE
Manufacturer:
FREESCAL
Quantity:
329
Part Number:
MC9S12E256MFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
13.3.2.12 Main Timer Interrupt Flag 1 (TFLG1)
Read: Anytime
Write: Used in the clearing mechanism (set bits cause corresponding bits to be cleared). Writing a zero will
not affect current status of the bit.
Freescale Semiconductor
C[7:4]F
Reset
Field
7:4
W
R
Input Capture/Output Compare Channel “x” Flag — These flags are set when an input capture or output
compare event occurs. Clear a channel flag by writing one to it.
When TFFCA bit in TSCR register is set, a read from an input capture or a write into an output compare channel
(0x0010–0x001F) will cause the corresponding channel flag CxF to be cleared.
C7F
0
7
The newly selected prescale factor will not take effect until the next
synchronized edge where all prescale counter stages equal zero.
= Unimplemented or Reserved
C6F
0
6
Figure 13-18. Main Timer Interrupt Flag 1 (TFLG1)
PR2
0
0
0
0
1
1
1
1
Table 13-15. TFLG1 Field Descriptions
Table 13-14. Timer Clock Selection
C5F
MC9S12E256 Data Sheet, Rev. 1.08
0
5
PR1
0
0
1
1
0
0
1
1
C4F
NOTE
0
4
PR0
Description
0
1
0
1
0
1
0
1
3
0
0
Bus Clock / 128
Bus Clock / 16
Bus Clock / 32
Bus Clock / 64
Bus Clock / 1
Bus Clock / 2
Bus Clock / 4
Bus Clock / 8
Timer Clock
Chapter 13 Timer Module (TIM16B4CV1)
0
0
2
0
0
1
0
0
0
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