MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 898

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC561MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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CALRAM Operation
22.2
22.3
The MPC561/MPC563 chip internal memory map is shown in
The CALRAM module is divided into two sections.
TheMPC561/MPC563 contains one CALRAM module — a 32-Kbyte memory at address 0x3F 8000 –
0x3F FFFF as shown in
address spaces: 12 implemented and four unimplemented registers. The 12 implemented registers are: one
module configuration register (CRAMMCR), one register reserved for factory test, eight region base
address (CRAM_RBAx) registers, one overlay configuration register (CRAMOVLCR), and one
ownership trace register (CALRAM_OTR) to support a separate module called READI. Refer to
Chapter 24, “READI
22-2
Control section:
— Includes all the registers in the CALRAM module
Array sub-region:
— Contains memory arrays
CALRAM Block Diagram
CALRAM Memory Map
RPCU
FP
+
JTAG
Module.”
Figure 22-1
32-Kbytes CALRAM
4-Kbyte Overlay
28-Kbyte SRAM
(Non Overlay)
BBC
L-Bus
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 22-1. System Block Diagram
and
Figure
22-2. In addition, the module is assigned 16 32-bit register
READI
Flash
Interface
L2U
U-BUS
Figure
Interface
UIMB
22-2.
USIU
Freescale Semiconductor
E-Bus

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