EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 291

• Manufacturer Part Number: EP9315-CBZ
• Description: IC ARM9 SOC ENH UNIV 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Cpu Speed: 200MHz
• No. Of Timers: 5
• Digital Ic Case Style: BGA
• Supply Voltage Range: 1.65V To 1.94V, 3V To 3.6V
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Case: BGA
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1139

BLKDESTWIDTH
DS785UM1
31
15
Address:
Default:
Mask:
Definition:
Bit Descriptions:
30
14
RSVD
29
13
28
12
0x8004_0018 - Read/Write
0x0000_0000
0x0000_0FFF
Block Function Destination Width Register.
RSVD:
WIDTH:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
The value in this field specifies the number of 32 bit words,
minus 1, that are needed to contain all of the pixels that
comprise width of the display. The value of LEN is
determined by:
1) Find how many pixels occupy a 32-bit word. For
example, four 8-bit pixels can occupy a 32-bit word.
2) Find the width of the display in pixels. For example, a
640x480 display has a width of 640 pixels.
3) The line length, LEN, is determined by the stride of the
display, that is, how many 32-bit words are needed to
populate the width of the display with pixels. From steps 1
and 2, the stride for this example is 640 pixels divided by
4, where 4 is the number of 8-bit pixels that occupy a
word. So, for this example, LEN = 640 / 4 = 160 = 0xA0.
Usually the same LEN value is used in both the
SRCLINELENGTH
register.
Reserved - Unknown during read
Width - Read/ Write
For Block Fill and Block Copy functions, the value in this
field specifies the number of 32-bit words, minus 1, that
are needed to contain the pixels in the 1st scan line of the
destination image. For example, please refer to the note in
Section 8.5.2.4 on page
field is 0xFFE = 4095 words.
24
8
RSVD
23
7
22
6
WIDTH
register and the
21
5
8-12. The maximum value for the
20
4
DESTLINELENGTH
19
3
Graphics Accelerator
EP93xx User’s Guide
18
2
17
1
16
8-27
0
8