EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 758

IC ARM9 SOC ENH UNIV 352PBGA

EP9315-CBZ

Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1139

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9315-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9315-CBZ
Manufacturer:
ALTERA
0
Part Number:
EP9315-CBZ
Manufacturer:
CIRRUS
Quantity:
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Part Number:
EP9315-CBZ
Quantity:
48
25
TSDischarge, TSXSample, TSYSample, TSDirect, TSDetect
25-20
Analog Touch Screen Interface
EP93xx User’s Guide
31
15
Bit Descriptions:
Address:
Default:
Definition:
Bit Descriptions:
RSVD
30
14
SCTL[29]
29
13
RSVD:
SDR:
Y, AD_X:
AD, AD_X:
28
12
TSDischarge: 0x8090_000C
TSXSample: 0x8090_0010
TSYSample: 0x8090_0014
TSDirect: 0x8090_0018
TSDetect: 0x8090_001C
0x0000_0000
Analog switch control Registers.
RSVD:
SCTL[29]:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown during read.
Synchronous Data Ready. This bit is set when new
conversion data from the ADC digital filter appears the
TSXYResult register. The bit is cleared when the
TSXYResult register is read. The bit is always clear unless
the touch screen scanning state machine is disabled
(TSSetup bit 15 is zero).
X and Y controller calculated reading when touch screen
controller is enabled at 12-bit resolution. The interrupt
output is cleared when this register is read.
Direct analog-to-digital controller output when touch
screen controller is disabled at 16-bit resolution.
Reserved. Unknown during read.
Analog switch control value for direct analog switch control
only (TSDirect) when the touch screen controller is
disabled. Controls DAC routing to ADC input.
24
8
SCTL
23
7
SCTL
22
6
21
5
20
4
19
3
18
2
17
1
DS785UM1
16
0

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