ST72F324J4B5 STMicroelectronics, ST72F324J4B5 Datasheet - Page 132

• Manufacturer Part Number: ST72F324J4B5
• Description: MCU 8BIT 16K FLASH 5V 42DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324J4B5

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -10°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7F521-IND/USB, ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 10 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-4848

ST72324Jx ST72324Kx
EMC CHARACTERISTICS (Cont’d)
12.8.3 Absolute Maximum Ratings (Electrical
Sensitivity)
Based on three different tests (ESD, LU and DLU)
using specific measurement methods, the product
is stressed in order to determine its performance in
terms of electrical sensitivity. For more details, re-
fer to the application note AN1181.
Absolute Maximum Ratings
Notes:
1. Data based on characterization results, not tested in production.
12.8.3.2 Static and Dynamic Latch-Up
■
Electrical Sensitivities
Notes:
1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC spec-
ifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the
JEDEC criteria (international standard).
132/164
1
V
V
V
LU: 3 complementary static tests are required
on 10 parts to assess the latch-up performance.
A supply overvoltage (applied to each power
supply pin) and a current injection (applied to
each input, output and configurable I/O pin) are
performed on each sample. This test conforms
to the EIA/JESD 78 IC latch-up standard. For
more details, refer to the application note
AN1181.
Symbol
Symbol
ESD(HBM)
ESD(MM)
ESD(CD)
DLU
LU
Electro-static discharge voltage
(Human Body Model)
Electro-static discharge voltage
(Machine Model)
Electro-static discharge voltage
(Charged Device Model)
Static latch-up class
Dynamic latch-up class
Parameter
Ratings
V
T
T
T
T
T
T
A
A
A
A
A
A
DD
=+25°C
=+25°C
=+25°C
=+25°C
=+85°C
=+125°C
=5.5V, f
12.8.3.1 Electro-Static Discharge (ESD)
Electro-Static Discharges (a positive then a nega-
tive pulse separated by 1 second) are applied to
the pins of each sample according to each pin
combination. The sample size depends on the
number of supply pins in the device (3 parts*(n+1)
supply pin). Two models can be simulated: Human
Body Model and Machine Model. This test con-
forms to the JESD22-A114A/A115A standard.
■
DLU: Electro-Static Discharges (one positive
then one negative test) are applied to each pin
of 3 samples when the micro is running to
assess the latch-up performance in dynamic
mode. Power supplies are set to the typical
values, the oscillator is connected as near as
possible to the pins of the micro and the
component is put in reset mode. This test
conforms to the IEC1000-4-2 and SAEJ1752/3
standards. For more details, refer to the
application note AN1181.
Conditions
Conditions
OSC
=4MHz, T
A
=+25°C
Maximum value
2000
200
250
Class
A
A
A
A
1)
1)
Unit
V