MC56F8002VWL Freescale Semiconductor, MC56F8002VWL Datasheet - Page 11

• Manufacturer Part Number: MC56F8002VWL
• Description: DSC 12K FLASH 32MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8002VWL

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 12KB (6K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 16
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 15x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Instruction Set Architecture: Dual Harvard
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 40
• Data Ram Size: 2 KB
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8006DEMO, APMOTOR56F8000E
• Interface Type: LIN, I2C, SCI, SPI
• Minimum Operating Temperature: - 40 C
• For Use With: APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.4
The documents listed in
Documentation is available from local Freescale distributors, Freescale Semiconductor sales offices, Freescale Literature
Distribution Centers, or online at http://www.freescale.com.
4
4.1
The input and output signals of the 56F8006/56F8002 are organized into functional groups, as detailed in
summarizes all device pins. In
Freescale Semiconductor
56F80x Serial Bootloader
56F8006/56F8002 Errata Details any chip issues that might be present
DSP56800E Reference
Technical Data Sheet
56F800x Peripheral
1
Reference Manual
56F8006/56F8002
Pins may be shared with other peripherals. See
Product Documentation
Signal/Connection Descriptions
Introduction
Serial Communications Interface 0 (SCI) Ports
JTAG/Enhanced On-Chip Emulation (EOnCE
User Guide
Inter-Integrated Circuit Interface (I
Manual
Analog-to-Digital Converter (ADC) Inputs
Topic
High Speed Analog Comparator Inputs
Serial Peripheral Interface (SPI) Ports
Programmable Gain Amplifiers (PGA)
Pulse Width Modulator (PWM) Ports
Programmable Delay Block (PDB)
Dual Timer Module (TMR) Ports
Power Inputs (V
Table 2
Ground (V
Functional Group
Table
are required for a complete description and proper design with the 56F8006/56F8002.
Reset
Clock
Detailed description of the 56800E family architecture,
16-bit digital signal controller core processor, and the
instruction set
Detailed description of peripherals of the 56F8006 and
56F8002 devices
Detailed description of the Serial Bootloader in the
56F800x family of devices
Electrical and timing specifications, pin descriptions, and
package descriptions (this document)
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 3
Table 2. 56F8006/56F8002 Device Documentation
SS
4, each table row describes the signal or signals present on a pin, sorted by pin number.
Table 3. Functional Group Pin Allocations
1
1
, V
DD
, V
SSA
DDA
)
2
)
C) Ports
1
1
1
1
1
1
Description
1
1
1
1
)
Table
Number of Pins
4.
in 28 SOIC
10
16
13
—
2
3
1
5
4
6
4
8
5
4
Number of Pins
in 32 LQFP
12
18
15
10
—
2
3
1
7
5
7
4
5
4
Signal/Connection Descriptions
DSP56800ERM
MC56F8006RM
Order Number
MC56F8006E
MC56F8006
Number of Pins
in 48 LQFP
TBD
Table
12
24
25
10
4
4
1
7
5
7
4
1
5
4
3.
Table 4
11