MC56F8002VWL Freescale Semiconductor, MC56F8002VWL Datasheet - Page 2

• Manufacturer Part Number: MC56F8002VWL
• Description: DSC 12K FLASH 32MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8002VWL

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 12KB (6K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 16
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 15x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Instruction Set Architecture: Dual Harvard
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 40
• Data Ram Size: 2 KB
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8006DEMO, APMOTOR56F8000E
• Interface Type: LIN, I2C, SCI, SPI
• Minimum Operating Temperature: - 40 C
• For Use With: APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
3
4
5
6
7
8
2
MC56F8006/MC56F8002 Family Configuration . . . . . . . . . . . .3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3.1
3.2
3.3
3.4
Signal/Connection Descriptions . . . . . . . . . . . . . . . . . . . . . . .11
4.1
4.2
4.3
Memory Maps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
5.1
5.2
5.3
5.4
5.5
5.6
General System Control Information . . . . . . . . . . . . . . . . . . .33
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
Security Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
7.1
7.2
7.3
Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
56F8006/56F8002 Features . . . . . . . . . . . . . . . . . . . . . .4
Award-Winning Development Environment. . . . . . . . . . .8
Architecture Block Diagram. . . . . . . . . . . . . . . . . . . . . . .9
Product Documentation . . . . . . . . . . . . . . . . . . . . . . . .11
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
56F8006/56F8002 Signal Pins . . . . . . . . . . . . . . . . . . .16
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Program Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Data Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Interrupt Vector Table and Reset Vector . . . . . . . . . . . .30
Peripheral Memory-Mapped Registers . . . . . . . . . . . . .31
EOnCE Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . .32
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
On-chip Clock Synthesis . . . . . . . . . . . . . . . . . . . . . . . .33
Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
System Integration Module (SIM) . . . . . . . . . . . . . . . . .36
PWM, PDB, PGA, and ADC Connections. . . . . . . . . . .37
Joint Test Action Group (JTAG)/Enhanced On-Chip
Emulator (EOnCE) . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Operation with Security Enabled. . . . . . . . . . . . . . . . . .39
Flash Access Lock and Unlock Mechanisms . . . . . . . .39
Product Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 3
Table of Contents
9
10 Package Mechanical Outline Drawings . . . . . . . . . . . . . . . . . 70
11 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Appendix A
Appendix B
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10 Relaxation Oscillator Timing . . . . . . . . . . . . . . . . . . . . 52
8.11 Reset, Stop, Wait, Mode Select, and Interrupt Timing. 53
8.12 External Oscillator (XOSC) Characteristics . . . . . . . . . 53
8.13 AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . 54
8.14 COP Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
8.15 PGA Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
8.16 ADC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
8.17 HSCMP Specifications . . . . . . . . . . . . . . . . . . . . . . . . 65
8.18 Optimize Power Consumption . . . . . . . . . . . . . . . . . . . 65
Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
9.1
9.2
9.3
10.1 28-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 70
10.2 32-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
10.3 48-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Interrupt Vector Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Peripheral Register Memory Map and Reset Value . . . . . . . 80
General Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 40
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . 41
Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 42
Recommended Operating Conditions . . . . . . . . . . . . . 44
DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . 45
Supply Current Characteristics . . . . . . . . . . . . . . . . . . 49
Flash Memory Characteristics . . . . . . . . . . . . . . . . . . . 50
External Clock Operation Timing. . . . . . . . . . . . . . . . . 51
Phase Locked Loop Timing . . . . . . . . . . . . . . . . . . . . . 51
Thermal Design Considerations . . . . . . . . . . . . . . . . . 67
Electrical Design Considerations. . . . . . . . . . . . . . . . . 68
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Freescale Semiconductor