PIC18F87J11-I/PT Microchip Technology, PIC18F87J11-I/PT Datasheet - Page 145

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PIC18F87J11-I/PT

Manufacturer Part Number
PIC18F87J11-I/PT
Description
IC PIC MCU FLASH 64KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F87J11-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F87J11-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE 10-14: PORTF FUNCTIONS
© 2009 Microchip Technology Inc.
RF1/AN6/
C2OUT
RF2/PMA5/
AN7//C1OUT
RF3/AN8/
C2INB
RF4/AN9/
C2INA
RF5/PMD2/
AN10/C1INB/
CV
RF6/PMD1/
AN11/C1INA
RF7/PMD0/
SS1
Legend:
Note 1:
Pin Name
REF
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate PMP configuration when the PMPMX Configuration bit = 0; available on 80-pin devices only.
Function
PMD2
PMD1
PMD0
C2OUT
C1OUT
C2INB
C2INA
C1INB
CV
C1INA
PMA5
AN10
AN11
RF1
AN6
RF2
AN7
RF3
AN8
RF4
AN9
RF5
RF6
RF7
SS1
REF
(1)
(1)
(1)
Setting
TRIS
0
1
1
x
0
1
x
1
x
0
1
1
x
0
1
1
x
0
1
x
x
1
x
x
0
1
x
x
1
x
0
1
x
x
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
TTL
I/O
ST
ST
ST
ST
ST
ST
ST
LATF<1> data output; not affected by analog input.
PORTF<1> data input; disabled when analog input enabled.
A/D input channel 6. Default configuration on POR.
Comparator 2 output.
LATF<2> data output; not affected by analog input.
PORTF<2> data input; disabled when analog input enabled.
Parallel Master Port address.
A/D input channel 7. Default configuration on POR.
Comparator 1 output.
LATF<3> data output; not affected by analog input.
PORTF<3> data input; disabled when analog input enabled.
A/D input channel 8. Default configuration on POR.
Comparator 2 input B.
LATF<4> data output; not affected by analog input.
PORTF<4> data input; disabled when analog input enabled.
A/D input channel 9. Default configuration on POR.
Comparator 2 input A.
LATF<5> data output; not affected by analog input. Disabled when
CV
PORTF<5> data input; disabled when analog input enabled. Disabled
when CV
Parallel Master Port data out.
Parallel Master Port data input.
A/D input channel 10 and Comparator C1+ input. Default input
configuration on POR.
Comparator 1 input B.
Comparator voltage reference output. Enabling this feature disables
digital I/O.
LATF<6> data output; not affected by analog input.
PORTF<6> data input; disabled when analog input enabled.
Parallel Master Port data out.
Parallel Master Port data input.
A/D input channel 11 and comparator C1- input. Default input
configuration on POR; does not affect digital output.
Comparator 1 input A.
LATF<7> data output.
PORTF<7> data input.
Parallel Master Port data out.
Parallel Master Port data input.
Slave select input for MSSP1 module.
REF
output enabled.
PIC18F87J11 FAMILY
REF
output enabled.
Description
DS39778D-page 145

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