PIC18F87J11-I/PT Microchip Technology, PIC18F87J11-I/PT Datasheet - Page 295

• Manufacturer Part Number: PIC18F87J11-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J11-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 15-ch x 10-bit
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The ANCON0 and ANCON1 registers are used to
configure the operation of the I/O pin associated with
each analog channel. Setting any one of the PCFG bits
configures the corresponding pin to operate as a digital
only I/O. Clearing a bit configures the pin to operate as
an analog input for either the A/D Converter or the
comparator module; all digital peripherals are disabled,
and digital inputs read as ‘0’. As a rule, I/O pins that are
multiplexed with analog inputs default to analog
operation on device Resets.
REGISTER 21-3:
REGISTER 21-4:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
PCFG15
PCFG7
R/W-0
R/W-0
(1)
AN15 through AN12 are implemented only on 80-pin devices. For 64-pin devices, the corresponding
PCFGx bits are still implemented for these channels, but have no effect.
PCFG7:PCFG6: Analog Port Configuration bits (AN7 and AN6)
1 = Pin configured as a digital port
0 = Pin configured as an analog channel; digital input disabled and reads ‘0’
Unimplemented: Read as ‘0’
PCFG4:PCFG0: Analog Port Configuration bits (AN4 through AN0)
1 = Pin configured as a digital port
0 = Pin configured as an analog channel; digital input disabled and reads ‘0’
PCFG15:PCFG8: Analog Port Configuration bits (AN15 through AN8)
1 = Pin configured as a digital port
0 = Pin configured as an analog channel; digital input disabled and reads ‘0’
PCFG14
PCFG6
R/W-0
R/W-0
ANCON0: A/D PORT CONFIGURATION REGISTER 2
ANCON1: A/D PORT CONFIGURATION REGISTER 1
(1)
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
PCFG13
R/W-0
U-0
—
(1)
PCFG12
PCFG4
R/W-0
R/W-0
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87J11 FAMILY
PCFG11
PCFG3
R/W-0
R/W-0
ANCON0 and ANCON1 are shared address SFRs, and
use the same addresses as the ADCON1 and
ADCON0 registers. The ANCON registers are
accessed by setting the ADSHR bit (WDTCON<4>).
See Section 5.3.4.1 “Shared Address SFRs” for
more information.
PCFG10
PCFG2
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
PCFG1
PCFG9
R/W-0
R/W-0
DS39778D-page 295
PCFG0
PCFG8
R/W-0
R/W-0
bit 0
bit 0