PIC18F87J11-I/PT Microchip Technology, PIC18F87J11-I/PT Datasheet - Page 237

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PIC18F87J11-I/PT

Manufacturer Part Number
PIC18F87J11-I/PT
Description
IC PIC MCU FLASH 64KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F87J11-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F87J11-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
REGISTER 19-6:
REGISTER 19-7:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
R/W-0
GCEN
R/W-1
MSK7
2:
If the I
writes to the SSPxBUF are disabled).
This register shares the same SFR address as SSPxADD, and is only addressable in select MSSPx
operating modes. See Section 19.4.3.4 “7-Bit Address Masking Mode” for more details.
MSK0 is not used as a mask bit in 7-bit addressing.
GCEN: General Call Enable bit
1 = Enables interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK5:ADMSK2: Slave Address Mask Select bits (5-Bit Address Masking mode)
1 = Masking of corresponding bits of SSPxADD enabled
0 = Masking of corresponding bits of SSPxADD disabled
ADMSK1: Slave Address Least Significant bit(s) Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SSPxADD<1> only enabled
0 = Masking of SSPxADD<1> only disabled
In 10-Bit Addressing mode:
1 = Masking of SSPxADD<1:0> enabled
0 = Masking of SSPxADD<1:0> disabled
SEN: Stretch Enable bit
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
MSK7:MSK0: Slave Address Mask Select bit
1 = Masking of corresponding bit of SSPxADD enabled
0 = Masking of corresponding bit of SSPxADD disabled
ACKSTAT
2
R/W-0
C module is active, this bit may not be set (no spooling) and the SSPBUF may not be written (or
R/W-1
MSK6
SSPxCON2: MSSPx CONTROL REGISTER 2 (I
SSPxMSK: I
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
ADMSK5
R/W-0
R/W-1
MSK5
2
C™ SLAVE ADDRESS MASK REGISTER (7-BIT MASKING MODE)
(1)
ADMSK4
R/W-0
R/W-1
MSK4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADMSK3
PIC18F87J11 FAMILY
R/W-0
R/W-1
MSK3
ADMSK2
2
R/W-0
R/W-1
MSK2
C™ SLAVE MODE)
x = Bit is unknown
x = Bit is unknown
ADMSK1
R/W-0
R/W-1
MSK1
DS39778D-page 237
MSK0
SEN
R/W-0
R/W-1
(1)
(2)
bit 0
bit 0
(1)

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