PIC18F4580T-I/PT Microchip Technology, PIC18F4580T-I/PT Datasheet - Page 142

• Manufacturer Part Number: PIC18F4580T-I/PT
• Description: IC PIC MCU FLASH 16KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4580T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIC18F2480/2580/4480/4580
TABLE 11-5:
TABLE 11-6:
DS39637D-page 142
RC0/T1OSO/
T13CKI
RC1/T1OSI
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
PORTC
LATC
TRISC
Legend:
Pin Name
Name
OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input
Function
LATC Output Latch Register
PORTC Data Direction Register
T1OSO
T13CKI
T1OSI
CCP1
SCK
SDA
SDO
RC0
RC1
RC2
RC3
SCL
RC4
RC5
RC6
RC7
PORTC I/O SUMMARY
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
SDI
Bit 7
RC7
CK
RX
DT
TX
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Bit 6
RC6
TRIS
0
1
x
1
0
1
x
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
0
1
0
0
1
0
1
1
0
1
1
1
1
Bit 5
RC5
I
2
I
C™/SMB I
2
Buffer
C/SMB
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
Bit 4
LATC<0> data output.
PORTC<0> data input.
Timer1 oscillator output – overrides the TRIS<0> control when enabled.
Timer1/Timer3 clock input.
LATC<1> data output.
PORTC<1> data input.
Timer1 oscillator input – overrides the TRIS<1> control when enabled.
LATC<2> data output.
PORTC<2> data input.
CCP1 compare output.
CCP1 capture input.
LATC<3> data output.
PORTC<3> data input.
SPI clock output (MSSP module) – must have TRIS set to ‘1’ to allow
MSSP module to control the bidirectional communication.
SPI clock input (MSSP module).
I
allow MSSP module to control the bidirectional communication.
LATC<4> data output.
PORTC<4> data input.
SPI data input (MSSP module).
I
allow MSSP module to control the bidirectional communication.
I
allow MSSP module to control the bidirectional communication.
LATC<5> data output.
PORTC<5> data input.
SPI data output (MSSP module).
LATC<6> data output.
PORTC<6> data input.
EUSART data output.
EUSART synchronous clock output – must have TRIS set to ‘1’ to enable
EUSART to control the bidirectional communication.
EUSART synchronous clock input.
LATC<7> data output.
PORTC<7> data input.
EUSART asynchronous data input.
EUSART synchronous data output – must have TRIS set to ‘1’ to enable
EUSART to control the bidirectional communication.
EUSART synchronous data input.
RC4
2
2
2
2
C™/SM bus clock output (MSSP module) – must have TRIS set to ‘1’ to
C/SM bus clock input.
C/SM bus data output (MSSP module) – must have TRIS set to ‘1’ to
C/SM bus data input (MSSP module) – must have TRIS set to ‘1’ to
Bit 3
RC3
Bit 2
RC2
Description
Bit 1
RC1
© 2009 Microchip Technology Inc.
Bit 0
RC0
on Page:
Values
Reset
58
58
58