PIC18F4580T-I/PT Microchip Technology, PIC18F4580T-I/PT Datasheet - Page 366

• Manufacturer Part Number: PIC18F4580T-I/PT
• Description: IC PIC MCU FLASH 16KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4580T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIC18F2480/2580/4480/4580
25.5.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits internal and external writes to data
EEPROM. The CPU can continue to read and write
data EEPROM regardless of the protection bit settings.
25.5.3
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In normal execution mode, the WRTC bit is
readable only. WRTC can only be written via ICSP or
an external programmer.
25.6
Eight memory locations (200000h-200007h) are
designated as ID locations, where the user can store
checksum or other code identification numbers. These
locations are both readable and writable during normal
execution through the TBLRD and TBLWT instructions
or during program/verify. The ID locations can be read
when the device is code-protected.
25.7
PIC18F2480/2580/4480/4580 microcontrollers can be
serially programmed while in the end application circuit.
This is simply done with two lines for clock and data
and three other lines for power, ground and the
programming voltage. This allows customers to manu-
facture boards with unprogrammed devices and then
program the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
25.8
When the DEBUG Configuration bit is programmed to
a ‘0’, the In-Circuit Debugger functionality is enabled.
This function allows simple debugging functions when
used with MPLAB
this feature enabled, some resources are not available
for general use. Table 25-4 shows which resources are
required by the background debugger.
TABLE 25-4:
DS39637D-page 366
I/O pins:
Stack:
Note:
ID Locations
In-Circuit Debugger
In-Circuit Serial Programming
DATA EEPROM
CODE PROTECTION
CONFIGURATION REGISTER
PROTECTION
Memory resources listed in MPLAB
®
DEBUGGER RESOURCES
IDE. When the microcontroller has
RB6, RB7
2 levels
®
IDE.
To use the In-Circuit Debugger function of the micro-
controller, the design must implement In-Circuit Serial
Programming connections to MCLR/V
V
debugger module available from Microchip or one of
the third party development tool companies.
25.9
The LVP Configuration bit enables Single-Supply ICSP
Programming (formerly known as Low-Voltage ICSP
Programming or LVP). When Single-Supply Program-
ming
programmed without requiring high voltage being
applied to the MCLR/V
PGM pin is then dedicated to controlling Program mode
entry and is not available as a general purpose I/O pin.
While programming using Single-Supply Program-
ming, V
normal execution mode. To enter Programming mode,
V
If Single-Supply ICSP Programming mode will not be
used, the LVP bit can be cleared. RB5/KBI1/PGM then
becomes available as the digital I/O pin, RB5. The LVP
bit may be set or cleared only when using standard
high-voltage programming (V
V
standard high-voltage programming is available and
must be used to program the device.
Memory that is not code-protected can be erased using
either a block erase, or erased row by row, then written
at any specified V
erased, a block erase is required. If a block erase is to
be performed when using Low-Voltage Programming,
the device must be supplied with V
SS
DD
PP
Note 1: High-voltage programming is always avail-
, RB7 and RB6. This will interface to the In-Circuit
/RE3 pin). Once LVP has been disabled, only the
is applied to the PGM pin.
is
DD
2: While in Low-Voltage ICSP Programming
3: When using Low-Voltage ICSP Program-
4: If the device Master Clear is disabled,
Single-Supply ICSP Programming
is applied to the MCLR/V
enabled,
able, regardless of the state of the LVP bit,
by applying V
mode, the RB5 pin can no longer be used
as a general purpose I/O pin and should
be held low during normal operation.
ming (LVP) and the pull-ups on PORTB
are enabled, bit 5 in the TRISB register
must be cleared to disable the pull-up on
RB5 and ensure the proper operation of
the device.
verify that either of the following is done to
ensure proper entry into ICSP mode:
a) disable Low-Voltage Programming
b) make certain that RB5/PGM is held
(CONFIG4l<2> = 0); or
low during entry into ICSP.
DD
. If code-protected memory is to be
the
PP
© 2009 Microchip Technology Inc.
/RE3 pin, but the RB5/KBI1/
IHH
microcontroller
IHH
to the MCLR pin.
applied to the MCLR/
DD
PP
of 4.5V to 5.5V.
/RE3 pin as in
PP
/RE3, V
can
DD
be
,