PIC18F4580T-I/PT Microchip Technology, PIC18F4580T-I/PT Datasheet - Page 167

• Manufacturer Part Number: PIC18F4580T-I/PT
• Description: IC PIC MCU FLASH 16KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4580T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

16.0
PIC18F2480/2580 devices have one CCP module.
PIC18F4480/4580
(Capture/Compare/PWM) modules. CCP1, discussed
in
Compare and Pulse-Width Modulation (PWM) modes.
ECCP1 implements an Enhanced PWM mode. The
ECCP implementation is discussed in Section 17.0
“Enhanced
Module”.
REGISTER 16-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
Note 1:
this
U-0
—
CAPTURE/COMPARE/PWM
(CCP) MODULES
chapter,
Selected by CANCAP (CIOCON<4>) bit; overrides the CCP1 input pin source.
Unimplemented: Read as ‘0’
DC1B<1:0>: CCP1 Module PWM Duty Cycle bit 1 and bit 0
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs (bit 1 and bit 0) of the 10-bit PWM duty cycle. The eight MSbs
(DC1B<9:2>) of the duty cycle are found in CCPR1L.
CCP1M<3:0>: CCP1 Module Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCP1 module)
0001 = Reserved
0010 = Compare mode; toggle output on match (CCP1IF bit is set)
0011 = Reserved
0100 = Capture mode; every falling edge or CAN message received (time-stamp)
0101 = Capture mode; every rising edge or CAN message received (time-stamp)
0110 = Capture mode; every 4th rising edge or every 4th CAN message received (time-stamp)
0111 = Capture mode; every 16th rising edge or every 16th CAN message received (time-stamp)
1000 = Compare mode; initialize CCP1 pin low; on compare match, force CCP1 pin high
1001 = Compare mode; initialize CCP pin high; on compare match, force CCP1 pin low
1010 = Compare mode; generate software interrupt on compare match (CCP1IF bit is set,
1011 = Compare mode; trigger special event; reset timer (TMR1 or TMR3, CCP1IF bit is set)
11xx = PWM mode
Capture/Compare/PWM
implements
U-0
—
devices
CCP1CON: CAPTURE/COMPARE/PWM CONTROL REGISTER
(CCPIF bit is set)
(CCPIF bit is set)
CCP1 pin reflects I/O state)
W = Writable bit
‘1’ = Bit is set
have
DC1B1
standard
R/W-0
two
PIC18F2480/2580/4480/4580
Capture,
(ECCP)
DC1B0
R/W-0
CCP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP1M3
R/W-0
The CCP1 module contains a 16-bit register which can
operate as a 16-bit Capture register, a 16-bit Compare
register or a PWM Master/Slave Duty Cycle register.
For the sake of clarity, all CCP module operation in the
following sections is described with respect to CCP1,
but is equally applicable to ECCP1.
Capture and Compare operations described in this
chapter apply to all standard and Enhanced CCP
modules. The operations of PWM mode, described in
Section 16.4 “PWM Mode”, apply to ECCP1 only.
CCP1M2
R/W-0
x = Bit is unknown
CCP1M1
R/W-0
(1)
(1)
DS39637D-page 167
CCP1M0
R/W-0
(1)
bit 0
(1)