D12321VF20V Renesas Electronics America, D12321VF20V Datasheet - Page 318

• Manufacturer Part Number: D12321VF20V
• Description: IC H8S/2321 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 7 DMA Controller (Not Supported in the H8S/2321)
Full Address Mode (Block Transfer Mode): Figure 7.22 shows a transfer example in which
TEND output is enabled and word-size full address mode transfer (block transfer mode) is
performed from internal 16-bit, 1-state access space to external 16-bit, 2-state access space.
A one-block transfer is performed for one transfer request, and after the transfer the bus is
released. While the bus is released, one or more bus cycles are executed by the CPU or DTC.
In the transfer end cycle of each block (the cycle in which the transfer counter reaches 0), a one-
state DMA dead cycle is inserted after the DMA write cycle.
One block is transmitted without interruption. NMI generation does not affect block transfer
operation.
Rev.6.00 Sep. 27, 2007 Page 286 of 1268
REJ09B0220-0600
Address bus
TEND
Figure 7.22 Example of Full Address Mode (Block Transfer Mode) Transfer
HWR
Bus release
LWR
RD
φ
DMA
read
DMA
write
Block transfer
DMA
read
DMA
write
DMA
dead
Bus release
DMA
read
DMA
write
Last block transfer
DMA
read
DMA
write
DMA
dead
Bus
release