D12321VF20V Renesas Electronics America, D12321VF20V Datasheet - Page 351

IC H8S/2321 MCU ROMLESS 128QFP

D12321VF20V

Manufacturer Part Number
D12321VF20V
Description
IC H8S/2321 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12321VF20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12321VF20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8.2.7
The DTC enable registers comprise six 8-bit readable/writable registers, DTCERA to DTCERF,
with bits corresponding to the interrupt sources that can activate the DTC. These bits enable or
disable DTC service for the corresponding interrupt sources.
The DTC enable registers are initialized to H'00 by a reset and in hardware standby mode.
Bit n—DTC Activation Enable (DTCEn)
Bit n
DTCEn
0
1
A DTCE bit can be set for each interrupt source that can activate the DTC. The correspondence
between interrupt sources and DTCE bits is shown in table 8.5, together with the vector numbers
generated by the interrupt controller.
For DTCE bit setting, read/write operations must be performed using bit-manipulation instructions
such as BSET and BCLR. For the initial setting only, however, when multiple activation sources
are set at one time, it is possible to disable interrupts and write after executing a dummy read on
the relevant register.
Bit
Initial value :
R/W
DTC Enable Registers (DTCER)
Description
DTC activation by this interrupt is disabled
[Clearing conditions]
DTC activation by this interrupt is enabled
[Holding condition]
When the DISEL bit is 0 and the specified number of transfers have not ended
:
:
When the DISEL bit is 1 and the data transfer has ended
When the specified number of transfers have ended
DTCE7
R/W
7
0
DTCE6
R/W
6
0
DTCE5
R/W
5
0
DTCE4
R/W
4
0
Rev.6.00 Sep. 27, 2007 Page 319 of 1268
DTCE3
R/W
3
0
Section 8 Data Transfer Controller
DTCE2
R/W
2
0
DTCE1
REJ09B0220-0600
R/W
1
0
(Initial value)
(n = 7 to 0)
DTCE0
R/W
0
0

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