D12321VF20V Renesas Electronics America, D12321VF20V Datasheet - Page 918

• Manufacturer Part Number: D12321VF20V
• Description: IC H8S/2321 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 19 ROM
FLER bit setting conditions are as follows:
• When flash memory is read during programming/erasing (including a vector read or instruction
• Immediately after exception handling (excluding a reset) during programming/erasing
• When a SLEEP instruction (including software standby) is executed during
• When a bus master other than the CPU (the DMAC or DTC) has control of the bus during
Error protection is released only by a reset and in hardware standby mode.
Figure 19.73 shows the flash memory state transition diagram.
Rev.6.00 Sep. 27, 2007 Page 886 of 1268
REJ09B0220-0600
Legend:
RD: Memory read possible
VF: Verify-read possible
PR: Programming possible
ER: Erasing possible
fetch)
programming/erasing
programming/erasing
Normal operating mode
RD VF PR ER
Program mode
occurrence
Erase mode
FLER = 0
Error protection mode
RD VF PR ER
Error
FLER = 1
Figure 19.73 Flash Memory State Transitions
Error occurrence
(software standby)
RD: Memory read not possible
VF: Verify-read not possible
PR: Programming not possible
ER: Erasing not possible
RES = 0 or STBY = 0
Software
standby mode
Software standby
mode release
RES = 0 or
STBY = 0
RES = 0 or
STBY = 0
FLMCR1, FLMCR2 (except FLER
bit), EBR1, EBR2 initialization state
Error protection mode
(software standby)
Reset or hardware standby
RD VF PR ER
(hardware protection)
FLER = 1
RD VF PR ER
FLER = 0
FLMCR1, FLMCR2,
EBR1, EBR2
initialization state