M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 198

• Manufacturer Part Number: M30800SFP-BL#U5
• Description: MCU 3/5V 0K,PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
1
v
J
6
Figure 25.3 DRAM refresh interval set register
1 .
0
C
• Refresh
9
0 .
8 /
B
The refresh method is CAS before RAS. The refresh interval is set by the DRAM refresh interval set
register (address 0041
refresh interval set register.
Use the following formula to determine the value to set in the refresh interval set register.
Refresh interval set register value (0 to 255) = refresh interval time / (BCLK frequency X 32) - 1
0
0
0
DRAM refresh interval set register
1
b7 b6 b5 b4 b3 b2 b1 b0
A
G
8
u
7
o r
. g
0 -
u
1
0
p
0
, 2
0
2
0
0
5
Page 185
Note: Refresh interval at 20 MHz operating (no division)
16
_______
). The refresh signal is not output in HOLD state. Figure 25.3 shows the DRAM
Bit symbol
Refresh interval = BCLK frequency X (refresh interval set bit + 1) X 32
f o
REFCNT0
REFCNT1
REFCNT2
REFCNT3
REFCNT4
REFCNT5
REFCNT6
REFCNT7
3
2
9
REFCNT
_______
Symbol
Refresh interval set bit
Bit name
Address
00041
16
Indeterminate
b7 b6 b5 b4 b3 b2 b1 b0
0 0 0 0 0 0 0 0 : 1.6 µs
0 0 0 0 0 0 0 1 : 3.2 µs
0 0 0 0 0 0 1 0 : 4.8 µs
1 1 1 1 1 1 1 1 : 409.6 µs
When reset
•
•
•
Function
25. DRAM Controller
(Note)
R
W