M30800SFP-BL#U5 Renesas Electronics America, M30800SFP-BL#U5 Datasheet - Page 63

• Manufacturer Part Number: M30800SFP-BL#U5
• Description: MCU 3/5V 0K,PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
8.5 Wait Mode
e
E
1
v
J
Table 8.5 Port status during wait mode
Note :When self-refresh is done in operating DRAM control, CAS and RAS becomes “L”.
6
1 .
0
________
________
__________
When a WAIT instruction is executed, the BCLK stops and the microcomputer enters the wait mode. In this
mode, oscillation continues but the BCLK and watchdog timer stop. Writing “1” to the WAIT peripheral
function clock stop bit and executing a WAIT instruction stops the clock being supplied to the internal
peripheral functions, allowing power dissipation to be reduced. Table 8.5 shows the status of the ports in
wait mode.
Wait mode is cancelled by a hardware reset or interrupt. If an interrupt is used to cancel wait mode, the
microcomputer restarts using as BCLK the clock that had been selected when the WAIT instruction was
executed.
When using an interrupt to exit Wait mode, the relevant interrupt must have been enabled and set to a
priority level above the level set by the interrupt priority set bits for exiting a stop/wait state (bits 2, 1, and 0
at address 009F
the flag register (FLG) processor interrupt level (IPL).
The priority level of the interrupt which is not used to cancel wait mode, must have been changed to 0.
When using an interrupt to exit Wait mode, the microcomputer resumes operating the clock that was oper-
ating when the WAIT command was executed as BCLK from the interrupt routine.
If only a hardware reset or an NMI interrupt is used to cancel stop mode, change the priority level of all
interrupt to 0, then shift to wait mode.
Address bus, data bus, CS0 to CS3,
BHE
RD, WR, WRL, WRH, DW, CASL,
CASH
RAS
HLDA,BCLK
ALE
Port
CLK
C
_____
________
9
0 .
8 /
B
0
0
0
1
OUT
______
A
8
G
u
7
o r
. g
0 -
u
1
________ _________ ______
0
p
0
, 2
0
2
0
0
16
5
Pin
When f
When f
). Set the interrupt priority set bits for the exit from a stop/wait state to the same level as
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_______
C
8
, f
selected
_________
32
f o
selected Does not stop when the WAIT peripheral function clock stop bit
______
_______
3
2
9
Does not stop
Retains status before wait mode
“H” (Note)
“H”
“L”
Retains status before wait mode
is “0”. When the WAIT peripheral function clock stop bit is “1”,
the status immediately prior to entering wait mode is main-
tained.
“H” (Note)
Memory expansion mode
Microprocessor mode
________
________
Retains status before wait mode
8. Clock Generating Circuit
Single-chip mode