MC908AZ60AVFUE Freescale Semiconductor, MC908AZ60AVFUE Datasheet - Page 149

IC MCU 61K FLASH 8.4MHZ 64-QFP

MC908AZ60AVFUE

Manufacturer Part Number
MC908AZ60AVFUE
Description
IC MCU 61K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ60AVFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-QFP
Processor Series
HC08AZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8.4 MHz
Number Of Programmable I/os
52
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 15 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 13
Break Module (BRK)
13.1 Introduction
The break module can generate a break interrupt that stops normal program flow at a defined address to
enter a background program.
13.2 Features
13.3 Functional Description
When the internal address bus matches the value written in the break address registers, the break module
issues a breakpoint signal to the CPU. The CPU then loads the instruction register with a software
interrupt instruction (SWI) after completion of the current CPU instruction. The program counter vectors
to $FFFC and $FFFD ($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
When a CPU-generated address matches the contents of the break address registers, the break interrupt
begins after the CPU completes its current instruction. A return-from-interrupt instruction (RTI) in the
break routine ends the break interrupt and returns the MCU to normal operation.
structure of the break module.
Freescale Semiconductor
Accessible I/O Registers during Break Interrupts
CPU-Generated Break Interrupts
Software-Generated Break Interrupts
COP Disabling during Break Interrupts
A CPU-generated address (the address in the program counter) matches the contents of the break
address registers.
Software writes a 1 to the BRKA bit in the break status and control register.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Figure 13-1
shows the
149

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