MC908AZ60AVFUE Freescale Semiconductor, MC908AZ60AVFUE Datasheet - Page 240

• Manufacturer Part Number: MC908AZ60AVFUE
• Description: IC MCU 61K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AVFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timer Interface Module B (TIMB)
ELSxB and ELSxA — Edge/Level Select Bits
240
MSxB
When ELSxB:A = 00, this read/write bit selects the initial output level of the TBCHx pin once PWM,
input capture or output compare operation is enabled (see
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to port F and pin PTFx/TBCHx is
available as a general-purpose I/O pin. However, channel x is at a state determined by these bits and
becomes transparent to the respective pin when PWM, input capture, or output compare mode is
enabled.
X
X
0
0
0
0
0
0
0
1
1
1
1 = Initial output level low
0 = Initial output level high
MSxA
Table 20-2
X
X
X
0
1
0
0
0
1
1
1
1
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIMB status and control register (TBSC).
Before enabling a TIMB channel register for input capture operation, make
sure that the PTFx/TBCHx pin is stable for at least two bus clocks.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
ELSxB
0
0
0
1
1
0
0
1
1
0
1
1
shows how ELSxB and ELSxA work. Reset clears the ELSxB and ELSxA bits.
Table 20-2. Mode, Edge, and Level Selection
ELSxA
0
0
1
0
1
0
1
0
1
1
0
1
Output compare
Buffered output
buffered PWM
Output preset
Input capture
compare or
or PWM
Mode
NOTE
NOTE
Pin under port control; initial output level high
Pin under port control; initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Table
20-2). Reset clears the MSxA bit.
Configuration
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