MC908AZ60AVFUE Freescale Semiconductor, MC908AZ60AVFUE Datasheet - Page 169

• Manufacturer Part Number: MC908AZ60AVFUE
• Description: IC MCU 61K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AVFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.4 LVI Status Register
The LVI status register flags V
LVIOUT — LVI Output Bit
16.5 LVI Interrupts
The LVI module does not generate interrupt requests.
16.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
16.6.1 Wait Mode
With the LVIPWR bit in the configuration register programmed to 1, the LVI module is active after a WAIT
instruction.
With the LVIRST bit in the configuration register programmed to 1, the LVI module can generate a reset
and bring the MCU out of wait mode.
Freescale Semiconductor
This read-only flag becomes set when the V
CGMXCLK cycles. (See
Address:
Reset:
Read:
Write:
LVI
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
TRIPF
V
V
V
V
LVIOUT
$FE0F
DD
DD
DD
DD
Bit 7
0
At Level:
< V
> LVI
< LVI
< LVI
< LVI
Table
DD
DD
Figure 16-3. LVI Status Register (LVISR)
TRIPR
TRIPF
TRIPF
TRIPF
< LVI
= Unimplemented
voltages below the LVI
6
0
0
16-1). Reset clears the LVIOUT bit.
Table 16-1. LVIOUT Bit Indication
TRIPR
V
DD
5
0
0
DD
< 32 CGMXCLK Cycles
> 40 CGMXCLK Cycles
voltage falls below the LVI
CGMXCLK Cycles:
Between 32 and 40
CGMXCLK Cycles
4
0
0
For Number of
TRIPF
Any
Any
3
0
0
level
.
2
0
0
Previous Value
TRIPF
1
0
0
LVIOUT
0 or 1
0
0
1
voltage for 32 to 40
Bit 0
LVI Status Register
0
0
169