HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 639

SH1 ROMLESS LEAD FREE

HD6417032F20V

Manufacturer Part Number
HD6417032F20V
Description
SH1 ROMLESS LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417032F20V
Manufacturer:
TI
Quantity:
201
Part Number:
HD6417032F20V
Manufacturer:
RENESAS
Quantity:
20
A.2.41
Start Address: H'5FFFFA2
Bus Width: 8/16/32
Note: * Only write 0 in the WW1 bit when area 1 is DRAM space. When it is external memory
Table A.42 WCR Bit Functions
Bit
Read/Write
Bit
Read/Write
Bit
15–8 Read wait
Bit Name
state control
(RW7–RW0)
Initial value:
Initial value:
space, do not write 0.
Wait State Control Register 1 (WCR1)
Value
0
1
RW7
R/W
15
1
7
1
WAIT
WAIT
Pin
Signal
Input
Not
sampled
during
read
cycle
Sampled
during
read
cycle
(Initial
value)
WAIT
WAIT
RW6
R/W
14
1
6
1
External
Memory Space
Areas 1, 3–5,
7: fixed at 1
cycle
Areas 0, 2, 6:
1 cycle + long
wait state
Areas 1, 3–5,
7: wait state is
2 cycles plus
WAIT
Areas 0, 2, 6:
1 cycle + long
wait state, or
wait state from
WAIT
RW5
R/W
13
1
5
1
External Space
Appendix A On-Chip Supporting Module Registers
RW4
R/W
12
1
4
1
Number of read cycles
DRAM
Space
Column
address
cycle: Fixed
at 1 cycle
(short-pitch)
Column
address
cycle: Wait
state is 2
cycles plus
WAIT (long-
pitch) *
Rev. 7.00 Jan 31, 2006 page 611 of 658
RW3
R/W
11
1
3
1
Multi-
plex
I/O
Wait
state
is 4
cycles
plus
WAIT
RW2
R/W
10
1
2
1
Internal Space
On-Chip
Modules
Fixed at
3 cycles
REJ09B0272-0700
WW1
R/W *
RW1
R/W
9
1
1
1
On-Chip
ROM,
RAM
Fixed at 1
cycle
RW0
R/W
8
1
0
1
BSC

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