HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 87

SH1 ROMLESS LEAD FREE

HD6417032F20V

Manufacturer Part Number
HD6417032F20V
Description
SH1 ROMLESS LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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4.4
4.4.1
Table 4.6 lists the types of interrupt exception handling sources (NMI, user break, IRQ, on-chip
supporting module).
Table 4.6
Interrupt
NMI
User break
IRQ
On-chip supporting
module
Each interrupt source has a different vector number and vector address offset value. See table 5.3,
Interrupt Exception Vectors and Rankings, in section 5, Interrupt Controller (INTC), for details on
vector numbers and vector table address offsets.
4.4.2
Interrupt sources are assigned priorities. When multiple interrupts occur at the same time, the
interrupt controller (INTC) ascertains their priorities and starts exception handling based on its
findings. Priorities from 16–0 can be assigned, with 0 the lowest level and 16 the highest. NMI has
priority level 16 and cannot be masked. NMI is always accepted. The user break priority level is
15. The IRQ and on-chip supporting module interrupt priority levels can be set in interrupt priority
level registers A–E (IPRA–IPRE) as shown in table 4.7. Priority levels 0–15 can be set. See
section 5.3.1, Interrupt Priority Registers A-E (IPRA–IPRE), for details.
Interrupts
Interrupt Sources
Interrupt Priority Rankings
Interrupt Sources
Requesting Pin or Module
NMI pin (external input)
User break controller
IRQ0–IRQ7 pin (external input)
Direct Memory Access Controller
16-bit integrated timer pulse unit
Serial communication interface
A/D converter
Watchdog timer
Bus state controller
Rev. 7.00 Jan 31, 2006 page 59 of 658
Section 4 Exception Handling
Number of Sources
1
1
8
4
15
8
1
1
2
REJ09B0272-0700

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