HD6417727F100V Renesas Electronics America, HD6417727F100V Datasheet - Page 426

• Manufacturer Part Number: HD6417727F100V
• Description: MPU 3V 16K PB-FREE 240-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100V

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 13 Li Bus State Controller (LBSC)
13.1.3
Bus control register 1 (BCR1) is a 16-bit read/write register that sets the functions and bus cycle
state for each area. It is initialized to H'0000 by a power-on reset, but it is not initialized by a
manual reset or in standby mode. Do not access external memory except area 0 until BCR1
register initialization is complete.
Note: * Samples the value of the external pin (MD5) designating endian at power-on reset.
Bits 15 to 12—Not referenced
Bit 11—Endian Flag (ENDIAN): Samples a value at the external pin which designates endian
(MD5) at a power-on reset. Endian for all physical spaces is decided by this bit. This bit is read-
only.
Bit 11: ENDIAN
0
1
Bits 10 to 5—Not referenced
Rev.6.00 Mar. 27, 2009 Page 368 of 1036
REJ09B0254-0600
Initial value:
Initial value:
Bus Control Register 1 (BCR1)
R/W:
R/W:
Bit:
Bit:
A5BST0 A6BST1 A6BST0
PULA
Description
At a reset, the endian setting external pin (MD5) is low, which indicates that
the SH7727 is set as big endian.
At a reset, the endian setting external pin (MD5) is high, which indicates that
the SH7727 is set as little endian.
R/W
R/W
15
0
7
0
PULD
R/W
R/W
14
0
6
0
HIZMEM HIZCNT ENDIAN A0BST1 A0BST0 A5BST1
R/W
R/W
13
0
5
0
DRAM
R/W
R/W
TP2
12
0
4
0
DRAM
0/1*
R/W
TP1
11
R
3
0
DRAM
R/W
R/W
TP0
10
0
2
0
A5PCM A6PCM
R/W
R/W
0
9
0
1
R/W
R/W
8
0
0
0