HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 800

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

16. Serial Communication Interface with FIFO (SCIF)
16.2.12 Line Status Register (SCLSR2)
Note:
Bits 15 to 1—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 0—Overrun Error (ORER): Indicates that an overrun error occurred during reception,
causing abnormal termination.
Bit 0: ORER
0
1
Notes: 1. The ORER flag is not affected and retains its previous state when the RE bit in
Rev.4.00 Oct. 10, 2008 Page 700 of 1122
REJ09B0370-0400
Initial value:
Initial value:
*
2. The receive data prior to the overrun error is retained in SCFRDR2, and the data
R/W:
R/W:
Bit:
Bit:
SCSCR2 is cleared to 0.
received subsequently is lost. Serial reception cannot be continued while the ORER flag
is set to 1.
Only 0 can be written, to clear the flag.
15
—
—
R
R
0
7
0
Description
Reception in progress, or reception has ended normally*
[Clearing conditions]
•
•
An overrun error occurred during reception*
[Setting condition]
When the next serial reception is completed while the receive FIFO is full
Power-on reset or manual reset
When 0 is written to ORER after reading ORER = 1
14
—
—
R
R
0
6
0
13
—
—
R
R
0
5
0
12
—
—
R
R
0
4
0
11
—
—
R
R
0
3
0
2
10
—
—
R
R
0
2
0
1
—
—
R
R
9
0
1
0
(Initial value)
(R/W)*
ORER
—
R
8
0
0
0