UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 13

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
CHAPTER 14 SERIAL INTERFACE UART6 ...................................................................................... 408
CHAPTER 15 SERIAL INTERFACE IICA........................................................................................... 449
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11................................................................ 525
13.4 Operational Amplifier Operations .......................................................................................... 407
14.1 Functions of Serial Interface UART6...................................................................................... 408
14.2 Configuration of Serial Interface UART6 ............................................................................... 413
14.3 Registers Controlling Serial Interface UART6....................................................................... 416
14.4 Operation of Serial Interface UART6...................................................................................... 427
15.1 Functions of Serial Interface IICA .......................................................................................... 449
15.2 Configuration of Serial Interface IICA .................................................................................... 452
15.3 Registers Controlling Serial Interface IICA ........................................................................... 454
15.4 I
15.5 I
15.6 Timing Charts ........................................................................................................................... 518
16.1 Functions of Serial Interfaces CSI10 and CSI11 ................................................................... 525
16.2 Configuration of Serial Interfaces CSI10 and CSI11............................................................. 526
16.3 Registers Controlling Serial Interfaces CSI10 and CSI11 .................................................... 528
16.4 Operation of Serial Interfaces CSI10 and CSI11 ................................................................... 537
2
2
C Bus Mode Functions .......................................................................................................... 467
C Bus Definitions and Control Methods .............................................................................. 469
13.4.1 Single AMP mode (operational amplifiers 0 and 1) ......................................................................407
13.4.2 PGA (Programmable gain amplifier) mode (operational amplifier 0 only) ....................................407
14.4.1 Operation stop mode ...................................................................................................................427
14.4.2 Asynchronous serial interface (UART) mode ...............................................................................428
15.4.3 Dedicated baud rate generator ....................................................................................................442
15.4.4 Calculation of baud rate ...............................................................................................................444
15.4.1 Pin configuration ..........................................................................................................................467
15.4.2 Setting transfer clock by using IICWL and IICWH registers .........................................................468
15.5.1 Start conditions ............................................................................................................................469
15.5.2 Addresses....................................................................................................................................470
15.5.3 Transfer direction specification ....................................................................................................470
15.5.4 Acknowledge (ACK).....................................................................................................................471
15.5.5 Stop condition ..............................................................................................................................472
15.5.6 Wait..............................................................................................................................................473
15.5.7 Canceling wait..............................................................................................................................475
15.5.8 Interrupt request (INTIICA0) generation timing and wait control ..................................................476
15.5.9 Address match detection method ................................................................................................477
15.5.10 Error detection ...........................................................................................................................477
15.5.11 Extension code ..........................................................................................................................477
15.5.12 Arbitration ..................................................................................................................................478
15.5.13 Wakeup function ........................................................................................................................480
15.5.14 Communication reservation .......................................................................................................484
15.5.15 Cautions.....................................................................................................................................488
15.5.16 Communication operations ........................................................................................................489
15.5.17 Timing of I
16.4.1 Operation stop mode ...................................................................................................................537
2
C interrupt request (INTIICA0) occurrence...............................................................497
Preliminary User’s Manual U19111EJ2V1UD
13

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