UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 324

no-image

UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
324
(TOLEV1 = 0)
<1> The count operation is enabled by setting TMHEn = 1. Start the 8-bit timer counter Hn by masking one count
<2> The CMP1n register value can be changed during timer counter operation. This operation is asynchronous
<3> When the values of the 8-bit timer counter Hn and the CMP0n register match, the value of the 8-bit timer
<4> If the CMP1n register value is changed, the value is latched and not transferred to the register. When the
<5> When the values of the 8-bit timer counter Hn and the CMP1n register after the change match, an inactive
<6> Clearing the TMHEn bit to 0 during timer Hn operation sets the INTTMHn signal to the default and PWM
Count clock
counter Hn
8-bit timer
INTTMH1
CMP01
CMP11
TMHE1
TOH1
clock to count up. At this time, PWM output outputs an inactive level.
to the count clock.
counter Hn is cleared, an active level is output, and the INTTMHn signal is output.
values of the 8-bit timer counter Hn and the CMP1n register before the change match, the value is
transferred to the CMP1n register and the CMP1n register value is changed (<2>’).
However, three count clocks or more are required from when the CMP1n register value is changed to when
the value is transferred to the register. If a match signal is generated within three count clocks, the changed
value cannot be transferred to the register.
level is output. The 8-bit timer counter Hn is not cleared and the INTTMHn signal is not generated.
output to an inactive level.
Remark 78K0/KY2-L, 78K0/KA2-L: n = 1
00H 01H 02H
<1>
78K0/KB2-L, 78K0/KC2-L: n = 0, 1
(e) Operation by changing CMP1n (CMP1n = 02H
02H
Figure 8-13. Operation Timing in PWM Output Mode (4/4)
80H
<2>
CHAPTER 8 8-BIT TIMERS H0 AND H1
Preliminary User’s Manual U19111EJ2V1UD
A5H 00H 01H 02H 03H
02H (03H)
<3>
<2>’
<4>
A5H
03H
A5H 00H 01H 02H 03H
03H, CMP0n = A5H)
<5>
A5H 00H
<6>

Related parts for UPD78F0550MA-FAA-AX