UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 480

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
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15.5.13 Wakeup function
and extension code have been received.
addresses do not match.
addresses are transmitted due to the possibility that an arbitration loss may change the master device (which has
generated a start condition) to a slave device.
the wakeup function, and this determines whether interrupt requests are enabled or disabled.
operation clock. An interrupt request signal (INTIICA0) is also generated when a local address and extension code
have been received. Operation returns to normal operation by using an instruction to clear (0) the WUP bit after this
interrupt has been generated.
480
The I
This function makes processing more efficient by preventing unnecessary INTIICA0 signal from occurring when
When a start condition is detected, wakeup standby mode is set. This wakeup standby mode is in effect while
However, when a stop condition is detected, bit 4 (SPIE0) of IICA control register 0 (IICACTL0) is set regardless of
To use the wakeup function in the STOP mode, set WUP to 1. Addresses can be received regardless of the
The flows of when setting the WUP bit and clearing (0) the WUP bit upon an address match are shown below.
2
C bus slave function is a function that generates an interrupt request signal (INTIICA0) when a local address
Figure 15-23. Flow When Setting WUP = 1
CHAPTER 15 SERIAL INTERFACE IICA
MSTS0 = STD0 = EXC0 = COI0 =0?
Preliminary User’s Manual U19111EJ2V1UD
STOP instruction execution
WUP = 1
START
Wait
Yes
Waits for 3 clocks.
No

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